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[X86][SSE] Add vector integer division by constant tests

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Expanded tests and split into sdiv/srem and udiv/urem cases for 128 and 256 bit vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263917 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2016-03-20 21:46:58 +00:00
parent eed77df1b6
commit 9cba37e8d4
5 changed files with 4953 additions and 1240 deletions
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1586
test/CodeGen/X86/vector-idiv-sdiv-128.ll Normal file
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File diff suppressed because it is too large Load Diff

964
test/CodeGen/X86/vector-idiv-sdiv-256.ll Normal file
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@ -0,0 +1,964 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
;
; sdiv by 7
;
define <4 x i64> @test_div7_4i64(<4 x i64> %a) nounwind {
; AVX-LABEL: test_div7_4i64:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrq $1, %xmm1, %rax
; AVX-NEXT: movabsq $5270498306774157605, %rcx # imm = 0x4924924924924925
; AVX-NEXT: imulq %rcx
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: vmovq %rdx, %xmm2
; AVX-NEXT: vmovq %xmm1, %rax
; AVX-NEXT: imulq %rcx
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: vmovq %rdx, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; AVX-NEXT: vpextrq $1, %xmm0, %rax
; AVX-NEXT: imulq %rcx
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: vmovq %rdx, %xmm2
; AVX-NEXT: vmovq %xmm0, %rax
; AVX-NEXT: imulq %rcx
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: vmovq %rdx, %xmm0
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = sdiv <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
ret <4 x i64> %res
}
define <8 x i32> @test_div7_8i32(<8 x i32> %a) nounwind {
; AVX-LABEL: test_div7_8i32:
; AVX: # BB#0:
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpmuldq %ymm2, %ymm3, %ymm2
; AVX-NEXT: vpmuldq %ymm1, %ymm0, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
; AVX-NEXT: vpaddd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vpsrld $31, %ymm0, %ymm1
; AVX-NEXT: vpsrad $2, %ymm0, %ymm0
; AVX-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = sdiv <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
ret <8 x i32> %res
}
define <16 x i16> @test_div7_16i16(<16 x i16> %a) nounwind {
; AVX-LABEL: test_div7_16i16:
; AVX: # BB#0:
; AVX-NEXT: vpmulhw {{.*}}(%rip), %ymm0, %ymm0
; AVX-NEXT: vpsrlw $15, %ymm0, %ymm1
; AVX-NEXT: vpsraw $1, %ymm0, %ymm0
; AVX-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = sdiv <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
ret <16 x i16> %res
}
define <32 x i8> @test_div7_32i8(<32 x i8> %a) nounwind {
; AVX-LABEL: test_div7_32i8:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrb $1, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpextrb $0, %xmm1, %ecx
; AVX-NEXT: movsbl %cl, %ecx
; AVX-NEXT: imull $-109, %ecx, %edx
; AVX-NEXT: shrl $8, %edx
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: movb %cl, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %cl
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: movzbl %cl, %ecx
; AVX-NEXT: vmovd %ecx, %xmm2
; AVX-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm1, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
; AVX-NEXT: vpextrb $1, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpextrb $0, %xmm0, %ecx
; AVX-NEXT: movsbl %cl, %ecx
; AVX-NEXT: imull $-109, %ecx, %edx
; AVX-NEXT: shrl $8, %edx
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: movb %cl, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %cl
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: movzbl %cl, %ecx
; AVX-NEXT: vmovd %ecx, %xmm2
; AVX-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm0, %eax
; AVX-NEXT: movsbl %al, %eax
; AVX-NEXT: imull $-109, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = sdiv <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
ret <32 x i8> %res
}
;
; srem by 7
;
define <4 x i64> @test_rem7_4i64(<4 x i64> %a) nounwind {
; AVX-LABEL: test_rem7_4i64:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrq $1, %xmm1, %rcx
; AVX-NEXT: movabsq $5270498306774157605, %rsi # imm = 0x4924924924924925
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: imulq %rsi
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: leaq (,%rdx,8), %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: subq %rax, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm1, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: imulq %rsi
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: leaq (,%rdx,8), %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: subq %rax, %rcx
; AVX-NEXT: vmovq %rcx, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; AVX-NEXT: vpextrq $1, %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: imulq %rsi
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: leaq (,%rdx,8), %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: subq %rax, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: imulq %rsi
; AVX-NEXT: movq %rdx, %rax
; AVX-NEXT: shrq $63, %rax
; AVX-NEXT: sarq %rdx
; AVX-NEXT: addq %rax, %rdx
; AVX-NEXT: leaq (,%rdx,8), %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: subq %rax, %rcx
; AVX-NEXT: vmovq %rcx, %xmm0
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = srem <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
ret <4 x i64> %res
}
define <8 x i32> @test_rem7_8i32(<8 x i32> %a) nounwind {
; AVX-LABEL: test_rem7_8i32:
; AVX: # BB#0:
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpmuldq %ymm2, %ymm3, %ymm2
; AVX-NEXT: vpmuldq %ymm1, %ymm0, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
; AVX-NEXT: vpaddd %ymm0, %ymm1, %ymm1
; AVX-NEXT: vpsrld $31, %ymm1, %ymm2
; AVX-NEXT: vpsrad $2, %ymm1, %ymm1
; AVX-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
; AVX-NEXT: vpmulld %ymm2, %ymm1, %ymm1
; AVX-NEXT: vpsubd %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = srem <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
ret <8 x i32> %res
}
define <16 x i16> @test_rem7_16i16(<16 x i16> %a) nounwind {
; AVX-LABEL: test_rem7_16i16:
; AVX: # BB#0:
; AVX-NEXT: vpmulhw {{.*}}(%rip), %ymm0, %ymm1
; AVX-NEXT: vpsrlw $15, %ymm1, %ymm2
; AVX-NEXT: vpsraw $1, %ymm1, %ymm1
; AVX-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; AVX-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm1
; AVX-NEXT: vpsubw %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = srem <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
ret <16 x i16> %res
}
define <32 x i8> @test_rem7_32i8(<32 x i8> %a) nounwind {
; AVX-LABEL: test_rem7_32i8:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrb $1, %xmm1, %eax
; AVX-NEXT: movsbl %al, %edx
; AVX-NEXT: imull $-109, %edx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb $7, %dil
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %edx
; AVX-NEXT: vpextrb $0, %xmm1, %eax
; AVX-NEXT: movsbl %al, %esi
; AVX-NEXT: imull $-109, %esi, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %sil
; AVX-NEXT: movzbl %sil, %eax
; AVX-NEXT: vmovd %eax, %xmm2
; AVX-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm1, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
; AVX-NEXT: vpextrb $1, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %esi
; AVX-NEXT: vpextrb $0, %xmm0, %eax
; AVX-NEXT: movsbl %al, %edx
; AVX-NEXT: imull $-109, %edx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: movb %al, %cl
; AVX-NEXT: shrb $7, %cl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vmovd %eax, %xmm2
; AVX-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm0, %eax
; AVX-NEXT: movsbl %al, %ecx
; AVX-NEXT: imull $-109, %ecx, %eax
; AVX-NEXT: shrl $8, %eax
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: movb %al, %dl
; AVX-NEXT: shrb $7, %dl
; AVX-NEXT: sarb $2, %al
; AVX-NEXT: addb %dl, %al
; AVX-NEXT: mulb %dil
; AVX-NEXT: subb %al, %cl
; AVX-NEXT: movzbl %cl, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = srem <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
ret <32 x i8> %res
}

1470
test/CodeGen/X86/vector-idiv-udiv-128.ll Normal file
View File

File diff suppressed because it is too large Load Diff

878
test/CodeGen/X86/vector-idiv-udiv-256.ll Normal file
View File

@ -0,0 +1,878 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
;
; udiv by 7
;
define <4 x i64> @test_div7_4i64(<4 x i64> %a) nounwind {
; AVX-LABEL: test_div7_4i64:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrq $1, %xmm1, %rcx
; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: shrq %rcx
; AVX-NEXT: addq %rdx, %rcx
; AVX-NEXT: shrq $2, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm1, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: shrq %rcx
; AVX-NEXT: addq %rdx, %rcx
; AVX-NEXT: shrq $2, %rcx
; AVX-NEXT: vmovq %rcx, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; AVX-NEXT: vpextrq $1, %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: shrq %rcx
; AVX-NEXT: addq %rdx, %rcx
; AVX-NEXT: shrq $2, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: shrq %rcx
; AVX-NEXT: addq %rdx, %rcx
; AVX-NEXT: shrq $2, %rcx
; AVX-NEXT: vmovq %rcx, %xmm0
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = udiv <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
ret <4 x i64> %res
}
define <8 x i32> @test_div7_8i32(<8 x i32> %a) nounwind {
; AVX-LABEL: test_div7_8i32:
; AVX: # BB#0:
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpmuludq %ymm2, %ymm3, %ymm2
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
; AVX-NEXT: vpsubd %ymm1, %ymm0, %ymm0
; AVX-NEXT: vpsrld $1, %ymm0, %ymm0
; AVX-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX-NEXT: vpsrld $2, %ymm0, %ymm0
; AVX-NEXT: retq
%res = udiv <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
ret <8 x i32> %res
}
define <16 x i16> @test_div7_16i16(<16 x i16> %a) nounwind {
; AVX-LABEL: test_div7_16i16:
; AVX: # BB#0:
; AVX-NEXT: vpmulhuw {{.*}}(%rip), %ymm0, %ymm1
; AVX-NEXT: vpsubw %ymm1, %ymm0, %ymm0
; AVX-NEXT: vpsrlw $1, %ymm0, %ymm0
; AVX-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX-NEXT: vpsrlw $2, %ymm0, %ymm0
; AVX-NEXT: retq
%res = udiv <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
ret <16 x i16> %res
}
define <32 x i8> @test_div7_32i8(<32 x i8> %a) nounwind {
; AVX-LABEL: test_div7_32i8:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrb $1, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpextrb $0, %xmm1, %ecx
; AVX-NEXT: imull $37, %ecx, %edx
; AVX-NEXT: shrl $8, %edx
; AVX-NEXT: subb %dl, %cl
; AVX-NEXT: shrb %cl
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: shrb $2, %cl
; AVX-NEXT: movzbl %cl, %ecx
; AVX-NEXT: vmovd %ecx, %xmm2
; AVX-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm1, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
; AVX-NEXT: vpextrb $1, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpextrb $0, %xmm0, %ecx
; AVX-NEXT: imull $37, %ecx, %edx
; AVX-NEXT: shrl $8, %edx
; AVX-NEXT: subb %dl, %cl
; AVX-NEXT: shrb %cl
; AVX-NEXT: addb %dl, %cl
; AVX-NEXT: shrb $2, %cl
; AVX-NEXT: movzbl %cl, %ecx
; AVX-NEXT: vmovd %ecx, %xmm2
; AVX-NEXT: vpinsrb $1, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm0, %eax
; AVX-NEXT: imull $37, %eax, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movzbl %al, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = udiv <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
ret <32 x i8> %res
}
;
; urem by 7
;
define <4 x i64> @test_rem7_4i64(<4 x i64> %a) nounwind {
; AVX-LABEL: test_rem7_4i64:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrq $1, %xmm1, %rcx
; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: shrq %rax
; AVX-NEXT: addq %rdx, %rax
; AVX-NEXT: shrq $2, %rax
; AVX-NEXT: leaq (,%rax,8), %rdx
; AVX-NEXT: subq %rax, %rdx
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm1, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: shrq %rax
; AVX-NEXT: addq %rdx, %rax
; AVX-NEXT: shrq $2, %rax
; AVX-NEXT: leaq (,%rax,8), %rdx
; AVX-NEXT: subq %rax, %rdx
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: vmovq %rcx, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; AVX-NEXT: vpextrq $1, %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: shrq %rax
; AVX-NEXT: addq %rdx, %rax
; AVX-NEXT: shrq $2, %rax
; AVX-NEXT: leaq (,%rax,8), %rdx
; AVX-NEXT: subq %rax, %rdx
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: vmovq %rcx, %xmm2
; AVX-NEXT: vmovq %xmm0, %rcx
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: mulq %rsi
; AVX-NEXT: movq %rcx, %rax
; AVX-NEXT: subq %rdx, %rax
; AVX-NEXT: shrq %rax
; AVX-NEXT: addq %rdx, %rax
; AVX-NEXT: shrq $2, %rax
; AVX-NEXT: leaq (,%rax,8), %rdx
; AVX-NEXT: subq %rax, %rdx
; AVX-NEXT: subq %rdx, %rcx
; AVX-NEXT: vmovq %rcx, %xmm0
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = urem <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7>
ret <4 x i64> %res
}
define <8 x i32> @test_rem7_8i32(<8 x i32> %a) nounwind {
; AVX-LABEL: test_rem7_8i32:
; AVX: # BB#0:
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpmuludq %ymm2, %ymm3, %ymm2
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[1,1,3,3,5,5,7,7]
; AVX-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7]
; AVX-NEXT: vpsubd %ymm1, %ymm0, %ymm2
; AVX-NEXT: vpsrld $1, %ymm2, %ymm2
; AVX-NEXT: vpaddd %ymm1, %ymm2, %ymm1
; AVX-NEXT: vpsrld $2, %ymm1, %ymm1
; AVX-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
; AVX-NEXT: vpmulld %ymm2, %ymm1, %ymm1
; AVX-NEXT: vpsubd %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = urem <8 x i32> %a, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
ret <8 x i32> %res
}
define <16 x i16> @test_rem7_16i16(<16 x i16> %a) nounwind {
; AVX-LABEL: test_rem7_16i16:
; AVX: # BB#0:
; AVX-NEXT: vpmulhuw {{.*}}(%rip), %ymm0, %ymm1
; AVX-NEXT: vpsubw %ymm1, %ymm0, %ymm2
; AVX-NEXT: vpsrlw $1, %ymm2, %ymm2
; AVX-NEXT: vpaddw %ymm1, %ymm2, %ymm1
; AVX-NEXT: vpsrlw $2, %ymm1, %ymm1
; AVX-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm1
; AVX-NEXT: vpsubw %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = urem <16 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
ret <16 x i16> %res
}
define <32 x i8> @test_rem7_32i8(<32 x i8> %a) nounwind {
; AVX-LABEL: test_rem7_32i8:
; AVX: # BB#0:
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpextrb $1, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %ecx
; AVX-NEXT: shrl $8, %ecx
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %cl, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %cl, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: movb $7, %cl
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %edx
; AVX-NEXT: vpextrb $0, %xmm1, %esi
; AVX-NEXT: imull $37, %esi, %edi
; AVX-NEXT: shrl $8, %edi
; AVX-NEXT: movb %sil, %al
; AVX-NEXT: subb %dil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %dil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %sil
; AVX-NEXT: movzbl %sil, %eax
; AVX-NEXT: vmovd %eax, %xmm2
; AVX-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm1, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
; AVX-NEXT: vpextrb $1, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %edx
; AVX-NEXT: vpextrb $0, %xmm0, %esi
; AVX-NEXT: imull $37, %esi, %edi
; AVX-NEXT: shrl $8, %edi
; AVX-NEXT: movb %sil, %al
; AVX-NEXT: subb %dil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %dil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %sil
; AVX-NEXT: movzbl %sil, %eax
; AVX-NEXT: vmovd %eax, %xmm2
; AVX-NEXT: vpinsrb $1, %edx, %xmm2, %xmm2
; AVX-NEXT: vpextrb $2, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $3, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $4, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $5, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $6, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $7, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $8, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $9, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $10, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $11, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $12, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $13, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $14, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2
; AVX-NEXT: vpextrb $15, %xmm0, %edx
; AVX-NEXT: imull $37, %edx, %esi
; AVX-NEXT: shrl $8, %esi
; AVX-NEXT: movb %dl, %al
; AVX-NEXT: subb %sil, %al
; AVX-NEXT: shrb %al
; AVX-NEXT: addb %sil, %al
; AVX-NEXT: shrb $2, %al
; AVX-NEXT: mulb %cl
; AVX-NEXT: subb %al, %dl
; AVX-NEXT: movzbl %dl, %eax
; AVX-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0
; AVX-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq
%res = urem <32 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7>
ret <32 x i8> %res
}

1295
test/CodeGen/X86/vector-idiv.ll
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