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[X86] Check YMM31/ZMM31 as well
- No test case as there's no calling convention preserve YMM31/ZMM31 only git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196391 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -122,11 +122,11 @@ static bool checkFnHasLiveInYmm(MachineRegisterInfo &MRI) {
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}
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}
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static bool clobbersAllYmmRegs(const MachineOperand &MO) {
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static bool clobbersAllYmmRegs(const MachineOperand &MO) {
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for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) {
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for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) {
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if (!MO.clobbersPhysReg(reg))
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if (!MO.clobbersPhysReg(reg))
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return false;
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return false;
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}
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}
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for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) {
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for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) {
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if (!MO.clobbersPhysReg(reg))
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if (!MO.clobbersPhysReg(reg))
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return false;
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return false;
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}
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}
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@ -155,11 +155,11 @@ static bool clobbersAnyYmmReg(MachineInstr *MI) {
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const MachineOperand &MO = MI->getOperand(i);
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegMask())
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if (!MO.isRegMask())
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continue;
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continue;
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for (unsigned reg = X86::YMM0; reg < X86::YMM31; ++reg) {
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for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) {
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if (MO.clobbersPhysReg(reg))
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if (MO.clobbersPhysReg(reg))
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return true;
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return true;
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}
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}
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for (unsigned reg = X86::ZMM0; reg < X86::ZMM31; ++reg) {
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for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) {
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if (MO.clobbersPhysReg(reg))
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if (MO.clobbersPhysReg(reg))
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return true;
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return true;
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}
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}
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