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AMDGPU: Add replacement bfe intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295899 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
@@ -569,7 +569,14 @@ def int_amdgcn_ds_swizzle :
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GCCBuiltin<"__builtin_amdgcn_ds_swizzle">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem, IntrConvergent]>;
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// llvm.amdgcn.lerp
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def int_amdgcn_ubfe : Intrinsic<[llvm_anyint_ty],
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[LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]
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>;
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def int_amdgcn_sbfe : Intrinsic<[llvm_anyint_ty],
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[LLVMMatchType<0>, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]
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>;
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def int_amdgcn_lerp :
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GCCBuiltin<"__builtin_amdgcn_lerp">,
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Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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@@ -2825,6 +2825,12 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::amdgcn_sffbh:
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return DAG.getNode(AMDGPUISD::FFBH_I32, DL, VT, Op.getOperand(1));
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case Intrinsic::amdgcn_sbfe:
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return DAG.getNode(AMDGPUISD::BFE_I32, DL, VT,
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Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
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case Intrinsic::amdgcn_ubfe:
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return DAG.getNode(AMDGPUISD::BFE_U32, DL, VT,
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Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
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case Intrinsic::amdgcn_cvt_pkrtz: {
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// FIXME: Stop adding cast if v2f16 legal.
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EVT VT = Op.getValueType();
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@@ -3231,6 +3231,79 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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break;
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}
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case Intrinsic::amdgcn_ubfe:
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case Intrinsic::amdgcn_sbfe: {
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// Decompose simple cases into standard shifts.
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Value *Src = II->getArgOperand(0);
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if (isa<UndefValue>(Src))
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return replaceInstUsesWith(*II, Src);
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unsigned Width;
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Type *Ty = II->getType();
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unsigned IntSize = Ty->getIntegerBitWidth();
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ConstantInt *CWidth = dyn_cast<ConstantInt>(II->getArgOperand(2));
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if (CWidth) {
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Width = CWidth->getZExtValue();
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if ((Width & (IntSize - 1)) == 0)
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return replaceInstUsesWith(*II, ConstantInt::getNullValue(Ty));
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if (Width >= IntSize) {
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// Hardware ignores high bits, so remove those.
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II->setArgOperand(2, ConstantInt::get(CWidth->getType(),
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Width & (IntSize - 1)));
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return II;
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}
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}
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unsigned Offset;
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ConstantInt *COffset = dyn_cast<ConstantInt>(II->getArgOperand(1));
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if (COffset) {
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Offset = COffset->getZExtValue();
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if (Offset >= IntSize) {
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II->setArgOperand(1, ConstantInt::get(COffset->getType(),
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Offset & (IntSize - 1)));
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return II;
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}
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}
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bool Signed = II->getIntrinsicID() == Intrinsic::amdgcn_sbfe;
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// TODO: Also emit sub if only width is constant.
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if (!CWidth && COffset && Offset == 0) {
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Constant *KSize = ConstantInt::get(COffset->getType(), IntSize);
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Value *ShiftVal = Builder->CreateSub(KSize, II->getArgOperand(2));
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ShiftVal = Builder->CreateZExt(ShiftVal, II->getType());
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Value *Shl = Builder->CreateShl(Src, ShiftVal);
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Value *RightShift = Signed ?
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Builder->CreateAShr(Shl, ShiftVal) :
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Builder->CreateLShr(Shl, ShiftVal);
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RightShift->takeName(II);
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return replaceInstUsesWith(*II, RightShift);
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}
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if (!CWidth || !COffset)
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break;
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// TODO: This allows folding to undef when the hardware has specific
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// behavior?
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if (Offset + Width < IntSize) {
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Value *Shl = Builder->CreateShl(Src, IntSize - Offset - Width);
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Value *RightShift = Signed ?
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Builder->CreateAShr(Shl, IntSize - Width) :
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Builder->CreateLShr(Shl, IntSize - Width);
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RightShift->takeName(II);
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return replaceInstUsesWith(*II, RightShift);
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}
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Value *RightShift = Signed ?
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Builder->CreateAShr(Src, Offset) :
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Builder->CreateLShr(Src, Offset);
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RightShift->takeName(II);
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return replaceInstUsesWith(*II, RightShift);
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}
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case Intrinsic::stackrestore: {
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// If the save is right next to the restore, remove the restore. This can
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// happen when variable allocas are DCE'd.
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@@ -0,0 +1,413 @@
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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; GCN-LABEL: {{^}}bfe_i32_arg_arg_arg:
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; GCN: v_bfe_i32
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define void @bfe_i32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 %src1)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_arg_arg_imm:
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; GCN: v_bfe_i32
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define void @bfe_i32_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 123)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_arg_imm_arg:
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; GCN: v_bfe_i32
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define void @bfe_i32_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 123, i32 %src2)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_imm_arg_arg:
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; GCN: v_bfe_i32
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define void @bfe_i32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 123, i32 %src1, i32 %src2)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}v_bfe_print_arg:
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; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 2, 8
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define void @v_bfe_print_arg(i32 addrspace(1)* %out, i32 addrspace(1)* %src0) #0 {
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%load = load i32, i32 addrspace(1)* %src0, align 4
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %load, i32 2, i32 8)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_arg_0_width_reg_offset:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_arg_0_width_reg_offset(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
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%bfe_u32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 %src1, i32 0)
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store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_arg_0_width_imm_offset:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_arg_0_width_imm_offset(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
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%bfe_u32 = call i32 @llvm.amdgcn.sbfe.i32(i32 %src0, i32 8, i32 0)
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store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_6:
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; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
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; GCN: s_endpgm
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define void @bfe_i32_test_6(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%shl = shl i32 %x, 31
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 1, i32 31)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_7:
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; GCN-NOT: shl
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_test_7(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%shl = shl i32 %x, 31
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 0, i32 31)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_8:
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; GCN: buffer_load_dword
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; GCN: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 1
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; GCN: s_endpgm
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define void @bfe_i32_test_8(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%shl = shl i32 %x, 31
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_9:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_9(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 31, i32 1)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_10:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_10(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 1, i32 31)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_11:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 8, v{{[0-9]+}}
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_11(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 8, i32 24)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_12:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_ashrrev_i32_e32 v{{[0-9]+}}, 24, v{{[0-9]+}}
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_12(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 24, i32 8)
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store i32 %bfe, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_13:
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; GCN: v_ashrrev_i32_e32 {{v[0-9]+}}, 31, {{v[0-9]+}}
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_13(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%shl = ashr i32 %x, 31
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)
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store i32 %bfe, i32 addrspace(1)* %out, align 4 ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_test_14:
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; GCN-NOT: lshr
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; GCN-NOT: {{[^@]}}bfe
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; GCN: s_endpgm
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define void @bfe_i32_test_14(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
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%x = load i32, i32 addrspace(1)* %in, align 4
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%shl = lshr i32 %x, 31
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%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %shl, i32 31, i32 1)
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store i32 %bfe, i32 addrspace(1)* %out, align 4 ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_0:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_constant_fold_test_0(i32 addrspace(1)* %out) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 0, i32 0, i32 0)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_1:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_constant_fold_test_1(i32 addrspace(1)* %out) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 12334, i32 0, i32 0)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_2:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_constant_fold_test_2(i32 addrspace(1)* %out) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 0, i32 0, i32 1)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_3:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_constant_fold_test_3(i32 addrspace(1)* %out) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 1, i32 0, i32 1)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_4:
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; GCN-NOT: {{[^@]}}bfe
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; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1
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; GCN: buffer_store_dword [[VREG]],
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; GCN: s_endpgm
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define void @bfe_i32_constant_fold_test_4(i32 addrspace(1)* %out) #0 {
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%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 4294967295, i32 0, i32 1)
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store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_5:
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; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_5(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 128, i32 7, i32 1)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_6:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0xffffff80
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_6(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 128, i32 0, i32 8)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_7:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_7(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 127, i32 0, i32 8)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_8:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_8(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 127, i32 6, i32 8)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_9:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_9(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 65536, i32 16, i32 8)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_10:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_10(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 65535, i32 16, i32 16)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_11:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -6
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_11(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 4, i32 4)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_12:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_12(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 31, i32 1)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_13:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_13(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 131070, i32 16, i32 16)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_14:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 40
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_14(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 2, i32 30)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_15:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 10
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_15(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 160, i32 4, i32 28)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_16:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_16(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 4294967295, i32 1, i32 7)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_17:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_17(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 255, i32 1, i32 31)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_i32_constant_fold_test_18:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_i32_constant_fold_test_18(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_i32 = call i32 @llvm.amdgcn.sbfe.i32(i32 255, i32 31, i32 1)
|
||||
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_sext_in_reg_i24:
|
||||
; GCN: buffer_load_dword [[LOAD:v[0-9]+]],
|
||||
; GCN-NOT: v_lshl
|
||||
; GCN-NOT: v_ashr
|
||||
; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 0, 24
|
||||
; GCN: buffer_store_dword [[BFE]],
|
||||
define void @bfe_sext_in_reg_i24(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %x, i32 0, i32 24)
|
||||
%shl = shl i32 %bfe, 8
|
||||
%ashr = ashr i32 %shl, 8
|
||||
store i32 %ashr, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: @simplify_demanded_bfe_sdiv
|
||||
; GCN: buffer_load_dword [[LOAD:v[0-9]+]]
|
||||
; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 1, 16
|
||||
; GCN: v_lshrrev_b32_e32 [[TMP0:v[0-9]+]], 31, [[BFE]]
|
||||
; GCN: v_add_i32_e32 [[TMP1:v[0-9]+]], vcc, [[TMP0]], [[BFE]]
|
||||
; GCN: v_ashrrev_i32_e32 [[TMP2:v[0-9]+]], 1, [[TMP1]]
|
||||
; GCN: buffer_store_dword [[TMP2]]
|
||||
define void @simplify_demanded_bfe_sdiv(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%src = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %src, i32 1, i32 16)
|
||||
%div = sdiv i32 %bfe, 2
|
||||
store i32 %div, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
declare i32 @llvm.amdgcn.sbfe.i32(i32, i32, i32) #1
|
||||
|
||||
attributes #0 = { nounwind }
|
||||
attributes #1 = { nounwind readnone }
|
||||
@@ -0,0 +1,623 @@
|
||||
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_arg_arg_arg:
|
||||
; GCN: v_bfe_u32
|
||||
define void @bfe_u32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 %src1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_arg_arg_imm:
|
||||
; GCN: v_bfe_u32
|
||||
define void @bfe_u32_arg_arg_imm(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 123)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_arg_imm_arg:
|
||||
; GCN: v_bfe_u32
|
||||
define void @bfe_u32_arg_imm_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src2) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 123, i32 %src2)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_imm_arg_arg:
|
||||
; GCN: v_bfe_u32
|
||||
define void @bfe_u32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 123, i32 %src1, i32 %src2)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_arg_0_width_reg_offset:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_arg_0_width_reg_offset(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 %src1, i32 0)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_arg_0_width_imm_offset:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_arg_0_width_imm_offset(i32 addrspace(1)* %out, i32 %src0, i32 %src1) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %src0, i32 8, i32 0)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zextload_i8:
|
||||
; GCN: buffer_load_ubyte
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zextload_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) #0 {
|
||||
%load = load i8, i8 addrspace(1)* %in
|
||||
%ext = zext i8 %load to i32
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i8:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN-NEXT: v_and_b32_e32
|
||||
; FIXME: Should be using s_add_i32
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i8(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 255
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i16:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN-NEXT: v_and_b32_e32
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i16(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 65535
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 0, i32 16)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i8_offset_1:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN: bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i8_offset_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 255
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 1, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i8_offset_3:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN-NEXT: v_and_b32_e32 {{v[0-9]+}}, 0xf8
|
||||
; GCN-NEXT: bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i8_offset_3(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 255
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 3, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i8_offset_7:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN-NEXT: v_and_b32_e32 {{v[0-9]+}}, 0x80
|
||||
; GCN-NEXT: bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i8_offset_7(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 255
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 7, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_zext_in_reg_i16_offset_8:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_add_i32
|
||||
; GCN-NEXT: bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_zext_in_reg_i16_offset_8(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%load = load i32, i32 addrspace(1)* %in, align 4
|
||||
%add = add i32 %load, 1
|
||||
%ext = and i32 %add, 65535
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %ext, i32 8, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_1:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN: v_and_b32_e32 {{v[0-9]+}}, 1, {{v[0-9]+}}
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 0, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @bfe_u32_test_2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @bfe_u32_test_3(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_4:
|
||||
; GCN-NOT: lshl
|
||||
; GCN-NOT: shr
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_4(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%shr = lshr i32 %shl, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shr, i32 31, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_5:
|
||||
; GCN: buffer_load_dword
|
||||
; GCN-NOT: lshl
|
||||
; GCN-NOT: shr
|
||||
; GCN: v_bfe_i32 {{v[0-9]+}}, {{v[0-9]+}}, 0, 1
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_5(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%shr = ashr i32 %shl, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shr, i32 0, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_6:
|
||||
; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}
|
||||
; GCN: v_lshrrev_b32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_6(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 1, i32 31)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_7:
|
||||
; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_7(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 0, i32 31)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_8:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_and_b32_e32 {{v[0-9]+}}, 1, {{v[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_8(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = shl i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_9:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_lshrrev_b32_e32 v{{[0-9]+}}, 31, v{{[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_9(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 31, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_10:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_lshrrev_b32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_10(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 1, i32 31)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_11:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_lshrrev_b32_e32 v{{[0-9]+}}, 8, v{{[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_11(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 8, i32 24)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_12:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_lshrrev_b32_e32 v{{[0-9]+}}, 24, v{{[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_12(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %x, i32 24, i32 8)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_13:
|
||||
; V_ASHRREV_U32_e32 {{v[0-9]+}}, 31, {{v[0-9]+}}
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_13(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = ashr i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4 ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_test_14:
|
||||
; GCN-NOT: lshr
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: s_endpgm
|
||||
define void @bfe_u32_test_14(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
|
||||
%x = load i32, i32 addrspace(1)* %in, align 4
|
||||
%shl = lshr i32 %x, 31
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %shl, i32 31, i32 1)
|
||||
store i32 %bfe, i32 addrspace(1)* %out, align 4 ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_0:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_0(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 0, i32 0, i32 0)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_1:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_1(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 12334, i32 0, i32 0)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_2:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_2(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 0, i32 0, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_3:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_3(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 1, i32 0, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_4:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], -1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_4(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 4294967295, i32 0, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_5:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_5(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 128, i32 7, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_6:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x80
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_6(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 128, i32 0, i32 8)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_7:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_7(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 127, i32 0, i32 8)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_8:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_8(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 127, i32 6, i32 8)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_9:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_9(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 65536, i32 16, i32 8)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_10:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_10(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 65535, i32 16, i32 16)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_11:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 10
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_11(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 4, i32 4)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_12:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_12(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 31, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_13:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 1
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_13(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 131070, i32 16, i32 16)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_14:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 40
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_14(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 2, i32 30)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_15:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 10
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_15(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 160, i32 4, i32 28)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_16:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_16(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 4294967295, i32 1, i32 7)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_17:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0x7f
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_17(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 255, i32 1, i32 31)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}bfe_u32_constant_fold_test_18:
|
||||
; GCN-NOT: {{[^@]}}bfe
|
||||
; GCN: v_mov_b32_e32 [[VREG:v[0-9]+]], 0
|
||||
; GCN: buffer_store_dword [[VREG]],
|
||||
; GCN: s_endpgm
|
||||
; EG-NOT: BFE
|
||||
define void @bfe_u32_constant_fold_test_18(i32 addrspace(1)* %out) #0 {
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 255, i32 31, i32 1)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Make sure that SimplifyDemandedBits doesn't cause the and to be
|
||||
; reduced to the bits demanded by the bfe.
|
||||
|
||||
; XXX: The operand to v_bfe_u32 could also just directly be the load register.
|
||||
; GCN-LABEL: {{^}}simplify_bfe_u32_multi_use_arg:
|
||||
; GCN: buffer_load_dword [[ARG:v[0-9]+]]
|
||||
; GCN: v_and_b32_e32 [[AND:v[0-9]+]], 63, [[ARG]]
|
||||
; GCN: v_bfe_u32 [[BFE:v[0-9]+]], [[AND]], 2, 2
|
||||
; GCN-DAG: buffer_store_dword [[AND]]
|
||||
; GCN-DAG: buffer_store_dword [[BFE]]
|
||||
; GCN: s_endpgm
|
||||
define void @simplify_bfe_u32_multi_use_arg(i32 addrspace(1)* %out0,
|
||||
i32 addrspace(1)* %out1,
|
||||
i32 addrspace(1)* %in) #0 {
|
||||
%src = load i32, i32 addrspace(1)* %in, align 4
|
||||
%and = and i32 %src, 63
|
||||
%bfe_u32 = call i32 @llvm.amdgcn.ubfe.i32(i32 %and, i32 2, i32 2)
|
||||
store i32 %bfe_u32, i32 addrspace(1)* %out0, align 4
|
||||
store i32 %and, i32 addrspace(1)* %out1, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}lshr_and:
|
||||
; GCN: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006
|
||||
; GCN: buffer_store_dword
|
||||
define void @lshr_and(i32 addrspace(1)* %out, i32 %a) #0 {
|
||||
%b = lshr i32 %a, 6
|
||||
%c = and i32 %b, 7
|
||||
store i32 %c, i32 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}v_lshr_and:
|
||||
; GCN: v_bfe_u32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}, 3
|
||||
; GCN: buffer_store_dword
|
||||
define void @v_lshr_and(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
|
||||
%c = lshr i32 %a, %b
|
||||
%d = and i32 %c, 7
|
||||
store i32 %d, i32 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}and_lshr:
|
||||
; GCN: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006
|
||||
; GCN: buffer_store_dword
|
||||
define void @and_lshr(i32 addrspace(1)* %out, i32 %a) #0 {
|
||||
%b = and i32 %a, 448
|
||||
%c = lshr i32 %b, 6
|
||||
store i32 %c, i32 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}and_lshr2:
|
||||
; GCN: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x30006
|
||||
; GCN: buffer_store_dword
|
||||
define void @and_lshr2(i32 addrspace(1)* %out, i32 %a) #0 {
|
||||
%b = and i32 %a, 511
|
||||
%c = lshr i32 %b, 6
|
||||
store i32 %c, i32 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}shl_lshr:
|
||||
; GCN: s_bfe_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x150002
|
||||
; GCN: buffer_store_dword
|
||||
define void @shl_lshr(i32 addrspace(1)* %out, i32 %a) #0 {
|
||||
%b = shl i32 %a, 9
|
||||
%c = lshr i32 %b, 11
|
||||
store i32 %c, i32 addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
declare i32 @llvm.amdgcn.ubfe.i32(i32, i32, i32) #1
|
||||
|
||||
attributes #0 = { nounwind }
|
||||
attributes #1 = { nounwind readnone }
|
||||
@@ -703,3 +703,223 @@ define <2 x half> @constant_rtz_pkrtz() {
|
||||
%cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float 65535.0, float 65535.0)
|
||||
ret <2 x half> %cvt
|
||||
}
|
||||
|
||||
; --------------------------------------------------------------------
|
||||
; llvm.amdgcn.ubfe
|
||||
; --------------------------------------------------------------------
|
||||
|
||||
declare i32 @llvm.amdgcn.ubfe.i32(i32, i32, i32) nounwind readnone
|
||||
declare i64 @llvm.amdgcn.ubfe.i64(i64, i32, i32) nounwind readnone
|
||||
|
||||
; CHECK-LABEL: @ubfe_var_i32(
|
||||
; CHECK-NEXT: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 %width)
|
||||
define i32 @ubfe_var_i32(i32 %src, i32 %offset, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_clear_high_bits_constant_offset_i32(
|
||||
; CHECK-NEXT: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 5, i32 %width)
|
||||
define i32 @ubfe_clear_high_bits_constant_offset_i32(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 133, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_clear_high_bits_constant_width_i32(
|
||||
; CHECK-NEXT: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 5)
|
||||
define i32 @ubfe_clear_high_bits_constant_width_i32(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 133)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_width_0(
|
||||
; CHECK-NEXT: ret i32 0
|
||||
define i32 @ubfe_width_0(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 0)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_width_31(
|
||||
; CHECK: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 31)
|
||||
define i32 @ubfe_width_31(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 31)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_width_32(
|
||||
; CHECK-NEXT: ret i32 0
|
||||
define i32 @ubfe_width_32(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 32)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_width_33(
|
||||
; CHECK-NEXT: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 1)
|
||||
define i32 @ubfe_width_33(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 33)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_33(
|
||||
; CHECK-NEXT: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 1, i32 %width)
|
||||
define i32 @ubfe_offset_33(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 33, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_0(
|
||||
; CHECK-NEXT: %1 = sub i32 32, %width
|
||||
; CHECK-NEXT: %2 = shl i32 %src, %1
|
||||
; CHECK-NEXT: %bfe = lshr i32 %2, %1
|
||||
; CHECK-NEXT: ret i32 %bfe
|
||||
define i32 @ubfe_offset_0(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 0, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_32(
|
||||
; CHECK-NEXT: %1 = sub i32 32, %width
|
||||
; CHECK-NEXT: %2 = shl i32 %src, %1
|
||||
; CHECK-NEXT: %bfe = lshr i32 %2, %1
|
||||
; CHECK-NEXT: ret i32 %bfe
|
||||
define i32 @ubfe_offset_32(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 32, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_31(
|
||||
; CHECK-NEXT: %1 = sub i32 32, %width
|
||||
; CHECK-NEXT: %2 = shl i32 %src, %1
|
||||
; CHECK-NEXT: %bfe = lshr i32 %2, %1
|
||||
; CHECK-NEXT: ret i32 %bfe
|
||||
define i32 @ubfe_offset_31(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 32, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_0_width_0(
|
||||
; CHECK-NEXT: ret i32 0
|
||||
define i32 @ubfe_offset_0_width_0(i32 %src) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 0, i32 0)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_0_width_3(
|
||||
; CHECK-NEXT: and i32 %src, 7
|
||||
; CHECK-NEXT: ret
|
||||
define i32 @ubfe_offset_0_width_3(i32 %src) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 0, i32 3)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_3_width_1(
|
||||
; CHECK-NEXT: %1 = lshr i32 %src, 3
|
||||
; CHECK-NEXT: and i32 %1, 1
|
||||
; CHECK-NEXT: ret i32
|
||||
define i32 @ubfe_offset_3_width_1(i32 %src) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 3, i32 1)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_3_width_4(
|
||||
; CHECK-NEXT: %1 = lshr i32 %src, 3
|
||||
; CHECK-NEXT: and i32 %1, 15
|
||||
; CHECK-NEXT: ret i32
|
||||
define i32 @ubfe_offset_3_width_4(i32 %src) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 3, i32 4)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_0_0_0(
|
||||
; CHECK-NEXT: ret i32 0
|
||||
define i32 @ubfe_0_0_0() {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 0, i32 0, i32 0)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_neg1_5_7(
|
||||
; CHECK-NEXT: ret i32 127
|
||||
define i32 @ubfe_neg1_5_7() {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 -1, i32 5, i32 7)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_undef_src_i32(
|
||||
; CHECK-NEXT: ret i32 undef
|
||||
define i32 @ubfe_undef_src_i32(i32 %offset, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 undef, i32 %offset, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_undef_offset_i32(
|
||||
; CHECK: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 undef, i32 %width)
|
||||
define i32 @ubfe_undef_offset_i32(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 undef, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_undef_width_i32(
|
||||
; CHECK: %bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 undef)
|
||||
define i32 @ubfe_undef_width_i32(i32 %src, i32 %offset) {
|
||||
%bfe = call i32 @llvm.amdgcn.ubfe.i32(i32 %src, i32 %offset, i32 undef)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_33_width_4_i64(
|
||||
; CHECK-NEXT: %1 = lshr i64 %src, 33
|
||||
; CHECK-NEXT: %bfe = and i64 %1, 15
|
||||
define i64 @ubfe_offset_33_width_4_i64(i64 %src) {
|
||||
%bfe = call i64 @llvm.amdgcn.ubfe.i64(i64 %src, i32 33, i32 4)
|
||||
ret i64 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_0_i64(
|
||||
; CHECK-NEXT: %1 = sub i32 64, %width
|
||||
; CHECK-NEXT: %2 = zext i32 %1 to i64
|
||||
; CHECK-NEXT: %3 = shl i64 %src, %2
|
||||
; CHECK-NEXT: %bfe = lshr i64 %3, %2
|
||||
; CHECK-NEXT: ret i64 %bfe
|
||||
define i64 @ubfe_offset_0_i64(i64 %src, i32 %width) {
|
||||
%bfe = call i64 @llvm.amdgcn.ubfe.i64(i64 %src, i32 0, i32 %width)
|
||||
ret i64 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @ubfe_offset_32_width_32_i64(
|
||||
; CHECK-NEXT: %bfe = lshr i64 %src, 32
|
||||
; CHECK-NEXT: ret i64 %bfe
|
||||
define i64 @ubfe_offset_32_width_32_i64(i64 %src) {
|
||||
%bfe = call i64 @llvm.amdgcn.ubfe.i64(i64 %src, i32 32, i32 32)
|
||||
ret i64 %bfe
|
||||
}
|
||||
|
||||
; --------------------------------------------------------------------
|
||||
; llvm.amdgcn.sbfe
|
||||
; --------------------------------------------------------------------
|
||||
|
||||
declare i32 @llvm.amdgcn.sbfe.i32(i32, i32, i32) nounwind readnone
|
||||
declare i64 @llvm.amdgcn.sbfe.i64(i64, i32, i32) nounwind readnone
|
||||
|
||||
; CHECK-LABEL: @sbfe_offset_31(
|
||||
; CHECK-NEXT: %1 = sub i32 32, %width
|
||||
; CHECK-NEXT: %2 = shl i32 %src, %1
|
||||
; CHECK-NEXT: %bfe = ashr i32 %2, %1
|
||||
; CHECK-NEXT: ret i32 %bfe
|
||||
define i32 @sbfe_offset_31(i32 %src, i32 %width) {
|
||||
%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 %src, i32 32, i32 %width)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @sbfe_neg1_5_7(
|
||||
; CHECK-NEXT: ret i32 -1
|
||||
define i32 @sbfe_neg1_5_7() {
|
||||
%bfe = call i32 @llvm.amdgcn.sbfe.i32(i32 -1, i32 5, i32 7)
|
||||
ret i32 %bfe
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @sbfe_offset_32_width_32_i64(
|
||||
; CHECK-NEXT: %bfe = ashr i64 %src, 32
|
||||
; CHECK-NEXT: ret i64 %bfe
|
||||
define i64 @sbfe_offset_32_width_32_i64(i64 %src) {
|
||||
%bfe = call i64 @llvm.amdgcn.sbfe.i64(i64 %src, i32 32, i32 32)
|
||||
ret i64 %bfe
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user