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[AMDGPU] Do not combine dpp mov reading physregs

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We cannot be sure physregs will stay unchanged.

Differential Revision: https://reviews.llvm.org/D69065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375033 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stanislav Mekhanoshin 2019-10-16 19:28:25 +00:00
parent 139b3c56f6
commit cb2a2f79ae
2 changed files with 30 additions and 0 deletions
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6
lib/Target/AMDGPU/GCNDPPCombine.cpp
View File

@ -375,7 +375,13 @@ bool GCNDPPCombine::combineDPPMov(MachineInstr &MovMI) const {
bool BoundCtrlZero = BCZOpnd->getImm();
auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old);
auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
assert(OldOpnd && OldOpnd->isReg());
assert(SrcOpnd && SrcOpnd->isReg());
if (OldOpnd->getReg().isPhysical() || SrcOpnd->getReg().isPhysical()) {
LLVM_DEBUG(dbgs() << " failed: dpp move reads physreg\n");
return false;
}
auto * const OldOpndValue = getOldOpndValue(*OldOpnd);
// OldOpndValue is either undef (IMPLICIT_DEF) or immediate or something else

24
test/CodeGen/AMDGPU/dpp_combine.mir
View File

@ -575,6 +575,30 @@ body: |
%2:vgpr_32 = V_CEIL_F32_e32 $vgpr0, implicit $exec
...
# Do not combine a dpp mov which reads a physreg.
# GCN-LABEL: name: phys_dpp_mov_old_src
# GCN: %0:vgpr_32 = V_MOV_B32_dpp undef $vgpr0, undef %1:vgpr_32, 1, 15, 15, 1, implicit $exec
# GCN: %2:vgpr_32 = V_CEIL_F32_e32 %0, implicit $exec
name: phys_dpp_mov_old_src
tracksRegLiveness: true
body: |
bb.0:
%1:vgpr_32 = V_MOV_B32_dpp undef $vgpr0, undef %0:vgpr_32, 1, 15, 15, 1, implicit $exec
%2:vgpr_32 = V_CEIL_F32_e32 %1, implicit $exec
...
# Do not combine a dpp mov which reads a physreg.
# GCN-LABEL: name: phys_dpp_mov_src
# GCN: %0:vgpr_32 = V_MOV_B32_dpp undef %1:vgpr_32, undef $vgpr0, 1, 15, 15, 1, implicit $exec
# GCN: %2:vgpr_32 = V_CEIL_F32_e32 %0, implicit $exec
name: phys_dpp_mov_src
tracksRegLiveness: true
body: |
bb.0:
%1:vgpr_32 = V_MOV_B32_dpp undef %0:vgpr_32, undef $vgpr0, 1, 15, 15, 1, implicit $exec
%2:vgpr_32 = V_CEIL_F32_e32 %1, implicit $exec
...
# GCN-LABEL: name: dpp_reg_sequence_both_combined
# GCN: %0:vreg_64 = COPY $vgpr0_vgpr1
# GCN: %1:vreg_64 = COPY $vgpr2_vgpr3