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fix an incorrect VT: eflags is always i32. The bug was causing us to

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create an X86ISD::Cmp node with result type i64 on the 
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96768 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-02-22 00:28:59 +00:00
parent 565a6f9480
commit ccfea35efb
1 changed files with 1 additions and 1 deletions
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lib/Target/X86/X86ISelLowering.cpp
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@ -5245,7 +5245,7 @@ SDValue X86TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
SDValue AndNode = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt, SDValue AndNode = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt,
DAG.getConstant(VTBits, MVT::i8)); DAG.getConstant(VTBits, MVT::i8));
SDValue Cond = DAG.getNode(X86ISD::CMP, dl, VT, SDValue Cond = DAG.getNode(X86ISD::CMP, dl, MVT::i32,
AndNode, DAG.getConstant(0, MVT::i8)); AndNode, DAG.getConstant(0, MVT::i8));
SDValue Hi, Lo; SDValue Hi, Lo;