RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2026-07-19 23:23:38 -04:00
Code Issues Packages Projects Releases 10 Wiki Activity

[WebAssembly] Make sign-extension opcodes a distinct feature.

Browse Source 
Sign-extension opcodes have been split into a separate proposal from
the main threads proposal, so switch them to their own target
feature. See:

https://github.com/WebAssembly/sign-extension-ops


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322966 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2018-01-19 17:16:24 +00:00
parent afa2e7e6a6
commit cee475a4d7
9 changed files with 32 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/Target/WebAssembly/WebAssembly.td
+5
View File
@@ -32,6 +32,11 @@ def FeatureNontrappingFPToInt :
"HasNontrappingFPToInt", "true",
"Enable non-trapping float-to-int conversion operators">;
def FeatureSignExt :
SubtargetFeature<"sign-ext",
"HasSignExt", "true",
"Enable sign extension operators">;
//===----------------------------------------------------------------------===//
// Architectures.
//===----------------------------------------------------------------------===//
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+1 -2
View File
@@ -117,8 +117,7 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
// As a special case, these operators use the type to mean the type to
// sign-extend from.
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
if (!Subtarget->hasAtomics()) {
// The Atomics feature includes signext intructions.
if (!Subtarget->hasSignExt()) {
for (auto T : {MVT::i8, MVT::i16, MVT::i32})
setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand);
}
lib/Target/WebAssembly/WebAssemblyInstrConv.td
+2 -2
View File
@@ -26,7 +26,7 @@ def I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src),
[(set I64:$dst, (zext I32:$src))],
"i64.extend_u/i32\t$dst, $src", 0xad>;
let Predicates = [HasAtomics] in {
let Predicates = [HasSignExt] in {
def I32_EXTEND8_S_I32 : I<(outs I32:$dst), (ins I32:$src),
[(set I32:$dst, (sext_inreg I32:$src, i8))],
"i32.extend8_s\t$dst, $src", 0xc0>;
@@ -42,7 +42,7 @@ def I64_EXTEND16_S_I64 : I<(outs I64:$dst), (ins I64:$src),
def I64_EXTEND32_S_I64 : I<(outs I64:$dst), (ins I64:$src),
[(set I64:$dst, (sext_inreg I64:$src, i32))],
"i64.extend32_s\t$dst, $src", 0xc4>;
} // Predicates = [HasAtomics]
} // Predicates = [HasSignExt]
} // defs = [ARGUMENTS]
lib/Target/WebAssembly/WebAssemblyInstrInfo.td
+8
View File
@@ -30,6 +30,14 @@ def NotHasNontrappingFPToInt :
Predicate<"!Subtarget->hasNontrappingFPToInt()">,
AssemblerPredicate<"!FeatureNontrappingFPToInt",
"nontrapping-fptoint">;
def HasSignExt :
Predicate<"Subtarget->hasSignExt()">,
AssemblerPredicate<"FeatureSignExt",
"sign-ext">;
def NotHasSignExt :
Predicate<"!Subtarget->hasSignExt()">,
AssemblerPredicate<"!FeatureSignExt",
"sign-ext">;
//===----------------------------------------------------------------------===//
// WebAssembly-specific DAG Node Types.
lib/Target/WebAssembly/WebAssemblySubtarget.cpp
+2 -2
View File
@@ -41,8 +41,8 @@ WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT,
const std::string &FS,
const TargetMachine &TM)
: WebAssemblyGenSubtargetInfo(TT, CPU, FS), HasSIMD128(false),
HasAtomics(false), HasNontrappingFPToInt(false), CPUString(CPU),
TargetTriple(TT), FrameLowering(),
HasAtomics(false), HasNontrappingFPToInt(false), HasSignExt(false),
CPUString(CPU), TargetTriple(TT), FrameLowering(),
InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
TLInfo(TM, *this) {}
lib/Target/WebAssembly/WebAssemblySubtarget.h
+2
View File
@@ -32,6 +32,7 @@ class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
bool HasSIMD128;
bool HasAtomics;
bool HasNontrappingFPToInt;
bool HasSignExt;
/// String name of used CPU.
std::string CPUString;
@@ -78,6 +79,7 @@ public:
bool hasSIMD128() const { return HasSIMD128; }
bool hasAtomics() const { return HasAtomics; }
bool hasNontrappingFPToInt() const { return HasNontrappingFPToInt; }
bool hasSignExt() const { return HasSignExt; }
/// Parses features string setting specified subtarget options. Definition of
/// function is auto generated by tblgen.
test/CodeGen/WebAssembly/load-ext-atomic.ll
+1 -1
View File
@@ -1,4 +1,4 @@
; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s
; RUN: llc < %s -mattr=+atomics,+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s
; Test that extending loads are assembled properly.
test/CodeGen/WebAssembly/offset-atomics.ll
+1 -1
View File
@@ -1,5 +1,5 @@
; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+atomics | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals -mattr=+atomics,+sign-ext | FileCheck %s
; Test that atomic loads are assembled properly.
test/CodeGen/WebAssembly/signext-inreg.ll
+10 -10
View File
@@ -1,5 +1,5 @@
; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s --check-prefix=NOATOMIC
; RUN: llc < %s -mattr=+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s --check-prefix=NOSIGNEXT
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown-wasm"
@@ -10,8 +10,8 @@ target triple = "wasm32-unknown-unknown-wasm"
; CHECK-NEXT: i32.extend8_s $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
; NOATOMIC-LABEL: i32_extend8_s
; NOATOMIC-NOT: i32.extend8_s
; NOSIGNEXT-LABEL: i32_extend8_s
; NOSIGNEXT-NOT: i32.extend8_s
define i32 @i32_extend8_s(i8 %x) {
%a = sext i8 %x to i32
ret i32 %a
@@ -23,8 +23,8 @@ define i32 @i32_extend8_s(i8 %x) {
; CHECK-NEXT: i32.extend16_s $push[[NUM:[0-9]+]]=, $0{{$}}
; CHECK-NEXT: return $pop[[NUM]]{{$}}
; NOATOMIC-LABEL: i32_extend16_s
; NOATOMIC-NOT: i32.extend16_s
; NOSIGNEXT-LABEL: i32_extend16_s
; NOSIGNEXT-NOT: i32.extend16_s
define i32 @i32_extend16_s(i16 %x) {
%a = sext i16 %x to i32
ret i32 %a
@@ -37,8 +37,8 @@ define i32 @i32_extend16_s(i16 %x) {
; CHECK-NEXT: i64.extend8_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
; NOATOMIC-LABEL: i64_extend8_s
; NOATOMIC-NOT: i64.extend8_s
; NOSIGNEXT-LABEL: i64_extend8_s
; NOSIGNEXT-NOT: i64.extend8_s
define i64 @i64_extend8_s(i8 %x) {
%a = sext i8 %x to i64
ret i64 %a
@@ -51,8 +51,8 @@ define i64 @i64_extend8_s(i8 %x) {
; CHECK-NEXT: i64.extend16_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
; CHECK-NEXT: return $pop[[NUM2]]{{$}}
; NOATOMIC-LABEL: i64_extend16_s
; NOATOMIC-NOT: i16.extend16_s
; NOSIGNEXT-LABEL: i64_extend16_s
; NOSIGNEXT-NOT: i16.extend16_s
define i64 @i64_extend16_s(i16 %x) {
%a = sext i16 %x to i64
ret i64 %a