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[DAGCombiner] add one-use restriction to vector transform with cheap extract

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We might be able to do better on the example in the test,
but in general, we should not scalarize a splatted vector
binop if there are other uses of the binop. Otherwise, we
can end up with code as we had - a scalar op that is
redundant with a vector op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372886 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel
2019-09-25 15:08:33 +00:00
parent bf42ae9f64
commit d7ca0d78e9
2 changed files with 8 additions and 11 deletions
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lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1 -1
View File
@@ -18990,7 +18990,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
// build_vector.
if (SVN->isSplat() && SVN->getSplatIndex() < (int)NumElts) {
int SplatIndex = SVN->getSplatIndex();
if (TLI.isExtractVecEltCheap(VT, SplatIndex) &&
if (N0.hasOneUse() && TLI.isExtractVecEltCheap(VT, SplatIndex) &&
TLI.isBinOp(N0.getOpcode()) && N0.getNode()->getNumValues() == 1) {
// splat (vector_bo L, R), Index -->
// splat (scalar_bo (extelt L, Index), (extelt R, Index))
test/CodeGen/X86/scalarize-fp.ll
+7 -10
View File
@@ -777,21 +777,18 @@ define <8 x float> @splat0_fdiv_const_op0_v8f32(<8 x float> %vx) {
define <4 x float> @multi_use_binop(<4 x float> %x, <4 x float> %y) {
; SSE-LABEL: multi_use_binop:
; SSE: # %bb.0:
; SSE-NEXT: movaps %xmm0, %xmm2
; SSE-NEXT: mulps %xmm1, %xmm2
; SSE-NEXT: mulss %xmm1, %xmm0
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; SSE-NEXT: mulps %xmm1, %xmm0
; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,2,0]
; SSE-NEXT: addps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: multi_use_binop:
; AVX: # %bb.0:
; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm2
; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX-NEXT: vmovddup {{.*#+}} xmm1 = xmm2[0,0]
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[0,1,2,0]
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX-NEXT: retq
%mul = fmul <4 x float> %x, %y
%mul0 = shufflevector <4 x float> %mul, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 0>