RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2026-07-20 19:04:10 -04:00
Code Issues Packages Projects Releases 10 Wiki Activity

GlobalISel: Fix MMO creation with non-power-of-2 mem size

Browse Source 
It should probably just be mandatory for getTgtMemIntrinsic to return
the alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352817 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
2019-01-31 23:41:23 +00:00
parent d217469872
commit dbe3ece2e5
2 changed files with 14 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CodeGen/GlobalISel/IRTranslator.cpp
+5 -4
View File
@@ -1213,12 +1213,13 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
TargetLowering::IntrinsicInfo Info;
// TODO: Add a GlobalISel version of getTgtMemIntrinsic.
if (TLI.getTgtMemIntrinsic(Info, CI, *MF, ID)) {
uint64_t Size = Info.memVT.getStoreSize();
if (Info.align == 0)
Info.align = Size;
unsigned Align = Info.align;
if (Align == 0)
Align = DL->getABITypeAlignment(Info.memVT.getTypeForEVT(F->getContext()));
uint64_t Size = Info.memVT.getStoreSize();
MIB.addMemOperand(MF->getMachineMemOperand(MachinePointerInfo(Info.ptrVal),
Info.flags, Size, Info.align));
Info.flags, Size, Align));
}
return true;
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+9
View File
@@ -2323,3 +2323,12 @@ define float @test_sqrt_f32(float %x) {
%y = call float @llvm.sqrt.f32(float %x)
ret float %y
}
; CHECK-LABEL: name: test_llvm.aarch64.neon.ld3.v4i32.p0i32
; CHECK: %1:_(s384) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.neon.ld3), %0(p0) :: (load 48 from %ir.ptr, align 64)
define void @test_llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr) {
%arst = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr)
ret void
}
declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0i32(i32*) #3