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fix a crash on CodeGen/X86/vector-rem.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46422 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1306,10 +1306,12 @@ SDOperand DAGCombiner::visitSREM(SDNode *N) {
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return DAG.getNode(ISD::SREM, VT, N0, N1);
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// If we know the sign bits of both operands are zero, strength reduce to a
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// urem instead. Handles (X & 0x0FFFFFFF) %s 16 -> X&15
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uint64_t SignBit = MVT::getIntVTSignBit(VT);
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if (DAG.MaskedValueIsZero(N1, SignBit) &&
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DAG.MaskedValueIsZero(N0, SignBit))
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return DAG.getNode(ISD::UREM, VT, N0, N1);
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if (!MVT::isVector(VT)) {
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uint64_t SignBit = MVT::getIntVTSignBit(VT);
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if (DAG.MaskedValueIsZero(N1, SignBit) &&
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DAG.MaskedValueIsZero(N0, SignBit))
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return DAG.getNode(ISD::UREM, VT, N0, N1);
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}
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// If X/C can be simplified by the division-by-constant logic, lower
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// X%C to the equivalent of X-X/C*C.
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