[AMDGPU] Run always inliner early in opt

Differential Revision: https://reviews.llvm.org/D31141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298281 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Konstantin Zhuravlyov
2017-03-20 18:06:45 +00:00
parent b4a2b00680
commit f6fa4ce469
3 changed files with 34 additions and 0 deletions
@@ -252,6 +252,7 @@ void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
return !GV.use_empty();
}));
PM.add(createGlobalDCEPass());
PM.add(createAMDGPUAlwaysInlinePass());
}
});
}
+12
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@@ -0,0 +1,12 @@
; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 %s | FileCheck %s
; CHECK: @add1alias = alias i32 (i32), i32 (i32)* @add1
; CHECK: @add1alias2 = alias i32 (i32), i32 (i32)* @add1
@add1alias = alias i32 (i32), i32 (i32)* @add1
@add1alias2 = alias i32 (i32), i32 (i32)* @add1
define i32 @add1(i32) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
+21
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@@ -0,0 +1,21 @@
; RUN: opt -mtriple=amdgcn-- -O1 -S -inline-threshold=1 -amdgpu-internalize-symbols %s | FileCheck %s
define i32 @callee(i32 %x) {
entry:
%mul1 = mul i32 %x, %x
%mul2 = mul i32 %mul1, %x
%mul3 = mul i32 %mul1, %mul2
%mul4 = mul i32 %mul3, %mul2
%mul5 = mul i32 %mul4, %mul3
ret i32 %mul5
}
; CHECK-LABEL: @caller
; CHECK: mul i32
; CHECK-NOT: call i32
define amdgpu_kernel i32 @caller(i32 %x) {
entry:
%res = call i32 @callee(i32 %x)
ret i32 %res
}