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PredicateOperand can be used as a normal operand for isel.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36947 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-05-08 21:06:08 +00:00
parent 59039632e1
commit f88b3a5698
2 changed files with 2 additions and 2 deletions
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2
lib/Target/PowerPC/PPCInstrInfo.td
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@ -272,7 +272,7 @@ def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits.
// PowerPC Predicate operand. 20 = (0<<5)|20 = always, CR0 is a dummy reg
// that doesn't matter.
def pred : PredicateOperand<(ops imm, CRRC), (ops (i32 20), CR0)> {
def pred : PredicateOperand<OtherVT, (ops imm, CRRC), (ops (i32 20), CR0)> {
let PrintMethod = "printPredicateOperand";
}

2
lib/Target/Target.td
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@ -254,7 +254,7 @@ def i64imm : Operand<i64>;
/// instruction. OpTypes specifies the MIOperandInfo for the operand, and
/// AlwaysVal specifies the value of this predicate when set to "always
/// execute".
class PredicateOperand<dag OpTypes, dag AlwaysVal> : Operand<OtherVT> {
class PredicateOperand<ValueType ty, dag OpTypes, dag AlwaysVal> : Operand<ty> {
let MIOperandInfo = OpTypes;
dag ExecuteAlways = AlwaysVal;
}