6 Commits

Author SHA1 Message Date
Stanislav Mekhanoshin c18c17dc52 [AMDGPU] gfx1010 core wave32 changes
Differential Revision: https://reviews.llvm.org/D63204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363934 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 15:08:34 +00:00
Stanislav Mekhanoshin 2ab8253e45 [AMDGPU] Pattern for v_xor3_b32
This also allows three op patterns to use increased constant bus
limit of GFX10.

Differential Revision: https://reviews.llvm.org/D61763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360395 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-10 00:09:01 +00:00
Stanislav Mekhanoshin 116060bd7d [AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32
GFX10 deprecates v_mul_lo_i32 instruction, so choose u32 form for
all targets.

Differential Revision: https://reviews.llvm.org/D61525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360094 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-06 22:27:05 +00:00
Stanislav Mekhanoshin 2f5fd7e3bd [AMDGPU] Ressociate 'add (add x, y), z' to use SALU
Reassociate adds to collect scalar operands in a single
instruction when possible. That will result in a scalar
add followed by vector instead of two vector adds, thus
better utilizing SALU.

Differential Revision: https://reviews.llvm.org/D58220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354066 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-14 22:11:25 +00:00
Changpeng Fang 844041aadf AMDGPU: Raise the priority of MAD24 in instruction selection.
Summary:
  We have seen performance regression when v_add3 is generated. The major reason is that the v_mad pattern
is broken when v_add3 is generated. We also see the register pressure increased. While we could not properly
estimate register pressure during instruction selection, we can give mad a higher priority.

In this work, we raise the priority for mad24 in selection and resolve the performance regression.

Reviewers:
  rampitec

Differential Revision:
  https://reviews.llvm.org/D56745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351273 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-15 23:12:36 +00:00
Nicolai Haehnle fd7ff8f493 AMDGPU: Generate VALU ThreeOp Integer instructions
Summary:
Original patch by: Fabian Wahlster <razor@singul4rity.com>

Change-Id: I148f692a88432541fad468963f58da9ddf79fac5

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, b-sumner, llvm-commits

Differential Revision: https://reviews.llvm.org/D51995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348488 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-06 14:33:40 +00:00