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  • 1394b1ccc8 DenseMap: add workaround for C++2a builds master Nekotekina 2020-02-10 14:45:40 +03:00
  • 9fb67ecaea RuntimeDyld: workaround use-after-free bug (Sections) Nekotekina 2020-02-01 17:21:47 +03:00
  • 2e038bff10 X86: fix VPTERNLOG constant arg Nekotekina 2019-12-13 15:47:03 +03:00
  • 9836c29973 Disable GDBRegistrationListener Nekotekina 2019-10-23 12:58:18 +03:00
  • d3983f0aa8 X86: add RTM to Haswell+ features Nekotekina 2019-06-20 00:15:55 +03:00
  • 5391c5c3a1 X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op. Nekotekina 2019-04-21 12:32:17 +03:00
  • c11d15d9b7 MCJIT: don't finalize modules on symbol lookup (workaround) Nekotekina 2018-07-21 12:08:55 +03:00
  • f14f80452c X86: add patterns for X86ISD::VSHLV and X86ISD::VSRLV Nekotekina 2018-07-06 00:24:31 +03:00
  • fd0cff5e13 X86: add pattern for X86ISD::VSRAV Nekotekina 2018-07-04 02:35:29 +03:00
  • 32c90c1321 X86: expand detectAVGPattern() Nekotekina 2018-06-27 15:00:34 +03:00
  • cad7dc67e9 X86: optimize VSELECT for v16i8 with shl + sign bit test Nekotekina 2018-06-19 21:38:53 +03:00
  • 071367dcb6 X86: combine inversion of VPTERNLOG Nekotekina 2018-01-30 00:50:12 +03:00
  • 514a46aa1e X86: LowerShift: new algorithm for vector-vector shifts Nekotekina 2018-01-30 00:41:56 +03:00
  • 19471fa18c X86: Fix/workaround Small Code Model for JIT Nekotekina 2018-05-12 13:46:20 +03:00
  • 7ff4bd1999 Set up CI with Azure Pipelines Ivan 2019-10-22 17:14:27 +03:00
  • 598ac5f591 Set up CI with Azure Pipelines old11 Ivan 2019-10-22 17:14:27 +03:00
  • 2c4ca6832f [InstCombine] Signed saturation patterns David Green 2019-10-22 15:39:47 +00:00
  • 6e8533b056 [InstCombine] Signed saturation tests. NFC David Green 2019-10-22 14:49:40 +00:00
  • e6fb6db568 [MIParser] Set RegClassOrRegBank during instruction parsing Petar Avramovic 2019-10-22 14:25:37 +00:00
  • ee57dd4921 [MIPS GlobalISel] Select MSA vector generic and builtin add Petar Avramovic 2019-10-22 13:51:57 +00:00
  • a461b7a03c [ThinLTO] Add code comment. NFC Eugene Leviant 2019-10-22 12:57:23 +00:00
  • 31ec98d4e0 [Alignment][NFC] Convert StoreInst to MaybeAlign Guillaume Chatelet 2019-10-22 12:55:32 +00:00
  • 8b6d26ec66 [Alignment][NFC] Convert LoadInst to MaybeAlign Guillaume Chatelet 2019-10-22 12:35:55 +00:00
  • 4a0e8977ca [PowerPC] Turn on CR-Logical reducer pass Nemanja Ivanovic 2019-10-22 12:20:38 +00:00
  • 77450cd609 [Alignment][NFC] Use MaybeAlign in AttrBuilder Guillaume Chatelet 2019-10-22 11:57:52 +00:00
  • 672893cf12 [Alignment][NFC] Attributes use Align/MaybeAlign Guillaume Chatelet 2019-10-22 09:51:06 +00:00
  • 55b4ec9194 [ThinLTO] Don't internalize during promotion Eugene Leviant 2019-10-22 09:24:12 +00:00
  • 5cd00d15af [LLVMDebugInfoPDB] - Use cantFail() instead of assert(). George Rimar 2019-10-22 08:52:45 +00:00
  • d35e5f8dde [CMake] [WinMsvc] Look for includes and libs in ${MSVC_BASE}/atlmfc Martin Storsjo 2019-10-22 06:36:27 +00:00
  • 5205202f41 [CMake] Allow overriding MSVC_DIA_SDK_DIR via CMake Martin Storsjo 2019-10-22 06:36:21 +00:00
  • 719615b78f gn build: Merge r375483 GN Sync Bot 2019-10-22 05:09:35 +00:00
  • eab745a12b [lit] Move increase_process_limit to ParallelRun Julian Lettner 2019-10-22 01:13:30 +00:00
  • 9c3636fbb6 [X86][BMI] Pull out schedule classes from bmi_andn<> and bmi_bls<> Simon Pilgrim 2019-10-21 23:41:40 +00:00
  • 1e4c44b0d4 [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) -> MOVMSK+CMP reduction combine Simon Pilgrim 2019-10-21 22:36:31 +00:00
  • d8c44a50c7 [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) movmsk v2X64 tests Simon Pilgrim 2019-10-21 22:36:07 +00:00
  • 88e224ab97 [examples] Add a dependency on ExecutionEngine to LLJITWithObjectCache example. Lang Hames 2019-10-21 22:29:29 +00:00
  • 34e11f6a0a AMDGPU/GlobalISel: Legalize fast unsafe FDIV Austin Kerbow 2019-10-21 22:18:26 +00:00
  • 6556cd04b7 [lit] Simplify test scheduling via multiprocessing.Pool Julian Lettner 2019-10-21 21:57:18 +00:00
  • e672b94bb1 AMDGPU: Select basic interp directly from intrinsics Matt Arsenault 2019-10-21 21:49:44 +00:00
  • 4d5ceef545 [lit] Remove redundancy from names and comments Julian Lettner 2019-10-21 21:41:59 +00:00
  • d8ca3c0d57 [CVP] No-wrap deduction for shl Roman Lebedev 2019-10-21 21:31:19 +00:00
  • c1a274e767 [GISel][CombinerHelper] Add a combine turning shuffle_vector into concat_vectors Quentin Colombet 2019-10-21 20:39:58 +00:00
  • 208bbb1797 AMDGPU: Use CopyToReg for interp intrinsic lowering Matt Arsenault 2019-10-21 19:53:49 +00:00
  • fdc698b726 AMDGPU: Erase redundant redefs of m0 in SIFoldOperands Matt Arsenault 2019-10-21 19:53:46 +00:00
  • ab2c9f7c79 AMDGPU: Stop adding m0 implicit def to SGPR spills Matt Arsenault 2019-10-21 19:42:29 +00:00
  • 12be54ce90 AMDGPU: Slightly restructure m0 init code Matt Arsenault 2019-10-21 19:42:26 +00:00
  • 6e6c5e79c9 [AMDGPU] Select AGPR in PHI operand legalization Stanislav Mekhanoshin 2019-10-21 19:25:27 +00:00
  • b1407138d4 [X86] Rename matchBitOpReduction to matchScalarReduction. NFCI. Simon Pilgrim 2019-10-21 19:19:50 +00:00
  • f5e25f84fa Reverted r375425 as it broke some buildbots. Sander de Smalen 2019-10-21 19:11:40 +00:00
  • c0f32bd552 [NFC][CVP] Add shl no-wrap deduction test coverage Roman Lebedev 2019-10-21 18:35:26 +00:00
  • b172b0f36f Prune Pass.h include from DataLayout.h. NFCI Bjorn Pettersson 2019-10-21 17:51:54 +00:00
  • aa0a5ffb56 [PowerPC] Regenerate test for D52431 Simon Pilgrim 2019-10-21 17:45:51 +00:00
  • a3e4f5daf6 [NFC] Add missing include to fix modules build Raphael Isemann 2019-10-21 17:43:38 +00:00
  • 25c29219cb SystemZISelLowering - supportedAddressingMode - silence static analyzer dyn_cast<> null dereference warning. NFCI. Simon Pilgrim 2019-10-21 17:16:03 +00:00
  • 2ae2f59248 GVNHoist - silence static analyzer dyn_cast<> null dereference warning in hasEHOrLoadsOnPath call. NFCI. Simon Pilgrim 2019-10-21 17:15:49 +00:00
  • c4c5944aa9 GuardWidening - silence static analyzer null dereference warning with assertion. NFCI. Simon Pilgrim 2019-10-21 17:15:37 +00:00
  • b0db20ce62 CrossDSOCFI - silence static analyzer dyn_cast<> null dereference warning. NFCI. Simon Pilgrim 2019-10-21 17:15:25 +00:00
  • 72157fef87 IndVarSimplify - silence static analyzer dyn_cast<> null dereference warning. NFCI. Simon Pilgrim 2019-10-21 17:15:05 +00:00
  • 4548d296c1 [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2) Sander de Smalen 2019-10-21 17:12:56 +00:00
  • c994a35a0d [NFC] Cleanup with variable name IsPPC64 & IsDarwin Xiangling Liao 2019-10-21 15:36:13 +00:00
  • ff6e4d503c [Alignment][NFC] Finish transition for Loads Guillaume Chatelet 2019-10-21 15:10:26 +00:00
  • a3253c0261 Pre-commit test cases for D64713. Jay Foad 2019-10-21 15:01:59 +00:00
  • 4bdbcfddaf [Types] Define a getWithNewBitWidth for Types and make use of it David Green 2019-10-21 14:51:49 +00:00
  • 9694ebf5f7 [Alignment][NFC] Instructions::getLoadStoreAlignment Guillaume Chatelet 2019-10-21 14:49:28 +00:00
  • 8c479efe73 [ARM] Extra qdadd patterns David Green 2019-10-21 14:06:49 +00:00
  • 471eaccd51 [Alignment][NFC] Add a helper function to DataLayout Guillaume Chatelet 2019-10-21 13:58:33 +00:00
  • d00dbb86c0 [docs][llvm-ar] Update llvm-ar command guide Owen Reynolds 2019-10-21 13:13:31 +00:00
  • 68b7d2e092 [ARM] Add qadd lowering from a sadd_sat David Green 2019-10-21 12:33:46 +00:00
  • 0e61c30e7d [Alignment][NFC] TargetCallingConv::setByValAlign Guillaume Chatelet 2019-10-21 12:05:33 +00:00
  • 91d68c5d93 Simplify usage of setFPAttrs. Jay Foad 2019-10-21 11:32:41 +00:00
  • cc870b19ca [llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<section_iterator> George Rimar 2019-10-21 11:06:38 +00:00
  • f69d71733b [Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentForCallingConv Guillaume Chatelet 2019-10-21 11:01:55 +00:00
  • db084dfbfd Fix llvm signal tests build. David Carlier 2019-10-21 10:44:20 +00:00
  • 685ae98920 [obj2yaml] - Fix a comment. NFC. George Rimar 2019-10-21 10:40:43 +00:00
  • 63b9649758 [obj2yaml] - Stop triggering UB when dumping corrupted strings. George Rimar 2019-10-21 10:38:03 +00:00
  • 7fc698b06a [MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type Values Sam Elliott 2019-10-21 10:00:34 +00:00
  • 32893f0502 [ARM] Lower sadd_sat to qadd8 and qadd16 David Green 2019-10-21 09:53:38 +00:00
  • 7f7fc30ded [ARM] Add and adjust saturation tests for upcoming qadd changes. NFC David Green 2019-10-21 09:43:37 +00:00
  • 2bcdb486dd Use Align for TFL::TransientStackAlignment Guillaume Chatelet 2019-10-21 08:31:25 +00:00
  • 475d7dd7ac [NFC][InstCombine] Fixup comments Roman Lebedev 2019-10-21 08:21:54 +00:00
  • 3ddad0b0b1 [CVP] Deduce no-wrap on mul Roman Lebedev 2019-10-21 08:21:44 +00:00
  • ec10cb25d9 [InstCombine] Allow values with multiple users in SimplifyDemandedVectorElts Piotr Sobczak 2019-10-21 08:12:47 +00:00
  • 919bed3ee7 gn build: Merge r375390 GN Sync Bot 2019-10-21 08:06:38 +00:00
  • 9cc8630a80 [LLDB] [Windows] Initial support for ARM register contexts Martin Storsjo 2019-10-21 08:02:34 +00:00
  • 53fb41197c [IR] Fix mayReadFromMemory() for writeonly calls Yevgeny Rouban 2019-10-21 06:52:08 +00:00
  • adc79ba5db [BPF] fix indirect call assembly code Yonghong Song 2019-10-21 03:22:03 +00:00
  • cd2c099476 [Attributor][FIX] Silence sign-compare warning Johannes Doerfert 2019-10-21 01:29:10 +00:00
  • 463d8212b2 [Attributor] Teach AANoCapture to use information in-flight more aggressively Johannes Doerfert 2019-10-21 00:48:42 +00:00
  • f5c1edb2b9 [X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64. Craig Topper 2019-10-20 23:54:19 +00:00
  • d1d5cb7698 [IndVars] Add a todo to reflect a further oppurtunity identified in D69009 Philip Reames 2019-10-20 23:44:01 +00:00
  • 9efd72ad02 [IndVars] Eliminate loop exits with equivalent exit counts Philip Reames 2019-10-20 23:38:02 +00:00
  • b93a52f5fe [InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern. Roman Lebedev 2019-10-20 20:52:06 +00:00
  • 150b0bedb7 [NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern. Roman Lebedev 2019-10-20 20:51:37 +00:00
  • b7aa2ef391 gn build: Merge r375375 GN Sync Bot 2019-10-20 20:44:56 +00:00
  • eec7ef7443 Reverted r375254 as it has broken some build bots for a long time. Vladimir Vereschaka 2019-10-20 20:39:33 +00:00
  • e568120da3 [InstCombine] Fold uadd.sat(a, b) == 0 and usub.sat(a, b) == 0 Nikita Popov 2019-10-20 20:19:42 +00:00
  • 2b0c82a99f Fix buildbot error in SIRegisterInfo.cpp. Zinovy Nis 2019-10-20 20:01:16 +00:00
  • 3ab0cb15c0 [InstCombine] Add tests for uadd/sub.sat(a, b) == 0; NFC Nikita Popov 2019-10-20 19:50:31 +00:00
  • 32d24a3249 [InstCombine] Shift amount reassociation in shifty sign bit test (PR43595) Roman Lebedev 2019-10-20 19:38:50 +00:00
  • 7bd6e166d9 [ConstantRange] makeGuaranteedNoWrapRegion(): shl support Roman Lebedev 2019-10-20 19:36:55 +00:00