 Stanislav Mekhanoshin
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c18c17dc52
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[AMDGPU] gfx1010 core wave32 changes
Differential Revision: https://reviews.llvm.org/D63204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363934 91177308-0d34-0410-b5e6-96231b3b80d8
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2019-06-20 15:08:34 +00:00 |
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Matt Arsenault
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32a10ab5dd
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AMDGPU: Correct maximum possible private allocation size
We were assuming a much larger possible per-wave visible stack
allocation than is possible:
https://github.com/RadeonOpenCompute/ROCR-Runtime/blob/faa3ae51388517353afcdaf9c16621f879ef0a59/src/core/runtime/amd_gpu_agent.cpp#L70
Based on this, we can assume the high 15 bits of a frame index or sret
are 0. The frame index value is the per-lane offset, so the maximum
frame index value is MAX_WAVE_SCRATCH / wavesize.
Remove the corresponding subtarget feature and option that made
this configurable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361541 91177308-0d34-0410-b5e6-96231b3b80d8
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2019-05-23 19:38:14 +00:00 |
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Yaxun Liu
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a2386c3b26
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[AMDGPU] Switch to the new addr space mapping by default
This requires corresponding clang change.
Differential Revision: https://reviews.llvm.org/D40955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324101 91177308-0d34-0410-b5e6-96231b3b80d8
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2018-02-02 16:07:16 +00:00 |
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Matt Arsenault
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bc9fb908bc
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AMDGPU: Don't use MUBUF vaddr if address may overflow
Effectively revert r263964. Before we would not
allow this if vaddr was not known to be positive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318240 91177308-0d34-0410-b5e6-96231b3b80d8
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2017-11-15 00:45:43 +00:00 |
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