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3 Commits

Author SHA1 Message Date
Stanislav Mekhanoshin c18c17dc52 [AMDGPU] gfx1010 core wave32 changes 
Differential Revision: https://reviews.llvm.org/D63204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363934 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-06-20 15:08:34 +00:00
Stanislav Mekhanoshin 2ab8253e45 [AMDGPU] Pattern for v_xor3_b32 
This also allows three op patterns to use increased constant bus
limit of GFX10.

Differential Revision: https://reviews.llvm.org/D61763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360395 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-05-10 00:09:01 +00:00
Nicolai Haehnle fd7ff8f493 AMDGPU: Generate VALU ThreeOp Integer instructions 
Summary:
Original patch by: Fabian Wahlster <razor@singul4rity.com>

Change-Id: I148f692a88432541fad468963f58da9ddf79fac5

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, b-sumner, llvm-commits

Differential Revision: https://reviews.llvm.org/D51995

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348488 91177308-0d34-0410-b5e6-96231b3b80d8
 2018-12-06 14:33:40 +00:00