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4 Commits

Author SHA1 Message Date
Luis Marques 85abf858b2 [RISCV] Switch to the Machine Scheduler 
Most of the test changes are trivial instruction reorderings and differing
register allocations, without any obvious performance impact.

Differential Revision: https://reviews.llvm.org/D66973

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372106 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-09-17 11:15:35 +00:00
Luis Marques 3049bc0fef Revert Patch from Phabricator 
This reverts r372092 (git commit e38695a0255c9e7b53639f349f8101bae1ce5c04)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372104 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-09-17 10:52:09 +00:00
Luis Marques 955b80686a Patch from Phabricator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372092 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-09-17 09:43:08 +00:00
Luis Marques e36a3e35dd [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting 
Some GEPs were not being split, presumably because that split would just be 
undone by the DAGCombiner. Not performing those splits can prevent important 
optimizations, such as preventing the element indices / member offsets from 
being (partially) folded into load/store instruction immediates. This patch:

- Makes the splits also occur in the cases where the base address and the GEP 
  are in the same BB.
- Ensures that the DAGCombiner doesn't reassociate them back again.

Differential Revision: https://reviews.llvm.org/D60294



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363544 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-06-17 10:54:12 +00:00