45 Commits

Author SHA1 Message Date
Thomas Lively 900f4bd9f0 [WebAssembly] v128.andnot
Summary:
As specified at
https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#bitwise-and-not

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373041 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-27 02:11:40 +00:00
Hans Wennborg 3b17e47a11 Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
This introduced a false positive MemorySanitizer warning about use of
uninitialized memory in a vectorized crc function in Chromium. That suggests
maybe something is not right with this transformation. See
https://crbug.com/992853#c7 for a reproducer.

This also reverts the follow-up commits r368307 and r368308 which
depended on this.

> This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract.
>
> In particular this helps remove some unnecessary scalar->vector->scalar patterns.
>
> The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue.
>
> Differential Revision: https://reviews.llvm.org/D65887

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368660 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-13 09:33:25 +00:00
Simon Pilgrim 621a67330b [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT
This patch attempts to peek through vectors based on the demanded bits/elt of a particular ISD::EXTRACT_VECTOR_ELT node, allowing us to avoid dependencies on ops that have no impact on the extract.

In particular this helps remove some unnecessary scalar->vector->scalar patterns.

The wasm shift patterns are annoying - @tlively has indicated that the wasm vector shift codegen are to be refactored in the near-term and isn't considered a major issue.

Differential Revision: https://reviews.llvm.org/D65887

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368276 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-08 10:37:03 +00:00
Benjamin Kramer 0ca3c92d55 [SelectionDAG] Do minnum->minimum at legalization time instead of building time
The SDAGBuilder behavior stems from the days when we didn't have fast
math flags available in SDAG. We do now and doing the transformation in
the legalizer has the advantage that it also works for vector types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364743 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-01 11:00:23 +00:00
Thomas Lively 65adefc141 [WebAssembly] Omit wrap on i64x2.{shl,shr*} ISel when possible
Summary:
Since the WebAssembly SIMD shift instructions take i32 operands, we
truncate the i64 operand to <2 x i64> shifts during ISel. When the i64
operand is sign extended from i32, this CL makes it so the sign
extension is dropped instead of a wrap instruction added.

Reviewers: dschuff, aheejin

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364446 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 16:19:59 +00:00
Thomas Lively 9fbbcd0441 [WebAssembly] Expand SIMD shifts while V8's implementation disagrees
Summary:
V8 currently implements SIMD shifts as taking an immediate operation,
which disagrees with the spec proposal and the toolchain
implementation. As a stopgap measure to get things working, unroll all
vector shifts. Since this is a temporary measure, there are no tests.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D56520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351151 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-15 02:16:03 +00:00
Thomas Lively 09b0852040 [WebAssembly] Add unimplemented-simd128 subtarget feature
Summary:
This is a third attempt, but this time we have vetted it on Windows
first. The previous errors were due to an uninitialized class member.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D56560

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350901 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 22:32:11 +00:00
Thomas Lively 54f94c3a2e Revert "[WebAssembly] Add simd128-unimplemented subtarget feature"
This reverts rL350791.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350795 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 04:09:25 +00:00
Thomas Lively 38f7d82a39 [WebAssembly] Add simd128-unimplemented subtarget feature
This is a second attempt at r350778, which was reverted in
r350789. The only change is that the unimplemented-simd128 feature has
been renamed simd128-unimplemented, since naming it
unimplemented-simd128 somehow made the simd128 feature flag enable the
unimplemented-simd128 feature on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350791 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 02:55:52 +00:00
Thomas Lively b56b09db88 Revert "[WebAssembly] Add unimplemented-simd128 subtarget feature"
This reverts L350778.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350789 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 01:37:44 +00:00
Thomas Lively 6d3d2f90b1 [WebAssembly] Add unimplemented-simd128 subtarget feature
Summary:
This replaces the old ad-hoc -wasm-enable-unimplemented-simd
flag. Also makes the new unimplemented-simd128 feature imply the
simd128 feature.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits, alexcrichton

Differential Revision: https://reviews.llvm.org/D56501

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350778 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-09 23:59:37 +00:00
Thomas Lively 37a984b8bc [WebAssembly] Massive instruction renaming
Summary:
An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some similarly-named identifiers.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D56338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350609 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-08 06:25:55 +00:00
Thomas Lively bfcb4d1513 [WebAssembly] Fix invalid machine instrs in -O0, verify in tests
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D55956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349889 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-21 06:58:15 +00:00
Thomas Lively d0092eb5f9 [WebAssembly] Gate unimplemented SIMD ops on flag
Summary:
Gates v128.const, f32x4.sqrt, f32x4.div, i8x16.extract_lane_u, and
i16x8.extract_lane_u on the --wasm-enable-unimplemented-simd flag,
since these ops are not implemented yet in V8.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D55904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349720 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-20 02:10:22 +00:00
Wouter van Oortmerssen 934cbe28f3 [WebAssembly] replaced .param/.result by .functype
Summary:
This makes it easier/cleaner to generate a single signature from
this directive. Also:
- Adds the symbol name, such that we don't depend on the location
  of this directive anymore.
- Actually constructs the signature in the assembler, and make the
  assembler own it.
- Refactor the use of MVT vs ValType in the streamer and assembler
  to require less conversions overall.
- Changed 700 or so tests to use it.

Reviewers: sbc100, dschuff

Subscribers: jgravelle-google, eraman, aheejin, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D54652

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347228 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-19 17:10:36 +00:00
Thomas Lively 437a937220 [WebAssembly] General vector shift lowering
Summary: Adds support for lowering non-splat shifts.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345916 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-02 00:39:57 +00:00
Thomas Lively a740192ca6 [SelectionDAG] DAG combiner for fminnan and fmaxnan
Summary: Depends on D52765.

Reviewers: aheejin, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345210 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-24 22:18:54 +00:00
Thomas Lively 7366ef73c4 [WebAssembly] Custom lower i64x2 constant shifts to avoid wrap
Summary: Depends on D53057.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344825 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-20 01:31:18 +00:00
Thomas Lively 3baba1cf36 [WebAssembly] SIMD min and max
Summary: Depends on D52324 and D52764.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52325

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344438 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-13 07:26:10 +00:00
Thomas Lively de0558be12 [WebAssembly] Fix fneg lowering
Summary:
Subtraction from zero and floating point negation do not have the same
semantics, so fix lowering.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52948

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344107 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-10 01:09:09 +00:00
Thomas Lively ce40693045 [WebAssembly] Handle V128 register class in explicit locals pass
Summary:
Also add tests to catch crashes in passes that are not normally run in
tests.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344094 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-09 23:33:16 +00:00
Thomas Lively 70285a0359 [WebAssembly] Saturating arithmetic intrinsics
Summary: Depends on D52805.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52813

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343833 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-05 00:45:20 +00:00
Thomas Lively 6f31a46f4a [WebAssembly] Bitselect intrinsic and instruction
Summary: Depends on D52755.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52805

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343739 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-03 23:02:23 +00:00
Thomas Lively 677102bae8 [WebAssembly] SIMD sqrt
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52387

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342937 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-25 03:39:28 +00:00
Thomas Lively 5989503820 [WebAssembly][NFC] Fix hardcoded stack indices in tests
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342928 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-24 23:42:07 +00:00
Thomas Lively 50dce07c8d [WebAssembly] v4f32.abs and v2f64.abs
Summary: implement lowering of @llvm.fabs for vector types.

Reviewers: aheejin, dschuff

Subscribers:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342513 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-18 21:45:12 +00:00
Thomas Lively f4a23c6776 [WebAssembly][NFC] Generalize operand numbers in SIMD tests
Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52130

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342303 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-15 01:12:48 +00:00
Thomas Lively db12109a87 [WebAssembly] SIMD shifts
Summary:
Implement shifts of vectors by i32. Since LLVM defines shifts as
binary operations between two vectors, this involves pattern matching
on splatted shift operands. For v2i64 shifts any i32 shift operands
have to be zero extended in the input and any i64 shift operands have
to be wrapped in the output. Depends on D52007.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51906

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342302 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-15 00:45:31 +00:00
Thomas Lively 8416bf9877 [WebAssembly] SIMD neg
Summary: Depends on D52007.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342296 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-14 22:35:12 +00:00
Thomas Lively 53fdce9a56 [WebAssembly][NFC] Move SIMD encoding tests to dedicated file
Summary:
This change makes the tests more focused and avoids problematic
interactions between the testing modes and instruction encoding. This
change also allows the other tests to use less verbose output and
stricter checks.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52007

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342287 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-14 21:21:42 +00:00
Thomas Lively 4d766060a1 [WebAssembly][NFC] Fix up SIMD bitwise tests
Summary:
The updated tests were previously infallible because the SIMD bitwise
operations do not contain vector types in their names.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340858 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-28 18:33:31 +00:00
Thomas Lively c9d8c58e72 [WebAssembly] v128.not
Implementation and tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340857 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-28 18:31:15 +00:00
Wouter van Oortmerssen a26aa42625 [WebAssembly] Added default stack-only instruction mode for MC.
Summary:
Made it convert from register to stack based instructions, and removed the registers.
Fixes to related code that was expecting register based instructions.
Added the correct testing flag to all tests, depending on what the
format they were expecting so far.
Translated one test to stack format as example: reg-stackify-stack.ll

tested:
llvm-lit -v `find test -name WebAssembly`
unittests/MC/*

Reviewers: dschuff, sunfish

Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb

Differential Revision: https://reviews.llvm.org/D51241

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340750 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-27 15:45:51 +00:00
Thomas Lively aaa1b676c3 [WebAssembly] SIMD Bitwise binary arithmetic
Summary: AND, OR, and XOR. This CL depends on D51113.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340505 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-23 00:48:37 +00:00
Thomas Lively f0aaf6f525 [WebAssembly] Arbitrary BUILD_VECTOR and remove i64x2.mul
Summary:
This CL adds support for arbitrary BUILD_VECTORS, i.e. not splats and
not consts. This is the last feature needed to properly lower v2i64
multiplies without a i64x2.mul instruction (which is not in the spec),
so i64x2.mul is removed as well.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51082

Remove unnecessary condition and fix whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340472 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-22 23:06:27 +00:00
Heejin Ahn 35b8f4b065 [WebAssembly] SIMD encoding tests
Modifies existing SIMD tests to also check that SIMD instructions are
lowered to the expected bytes. This CL depends on D50597.

Reviewers: aheejin

Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits

Differential Revision: https://reviews.llvm.org/D50660

Patch by Thomas Lively (tlively)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339712 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-14 19:10:50 +00:00
Wouter van Oortmerssen a297d96416 Revert "[WebAssembly] Added default stack-only instruction mode for MC."
This reverts commit 917a99b71ce21c975be7bfbf66f4040f965d9f3c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339630 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-13 23:12:49 +00:00
Wouter van Oortmerssen eb8079e823 [WebAssembly] Added default stack-only instruction mode for MC.
Summary:
Moved Explicit Locals pass to last.
Made that pass obligatory.
Made it convert from register to stack based instructions, and removed the registers.
Fixes to related code that was expecting register based instructions.
Added the correct testing flag to all tests, depending on what the
format they were expecting so far.
Translated one test to stack format as example: reg-stackify-stack.ll

tested:
llvm-lit -v `find test -name WebAssembly`
unittests/MC/*

Reviewers: dschuff, sunfish

Subscribers: jfb, llvm-commits, aheejin, eraman, jgravelle-google, sbc100

Differential Revision: https://reviews.llvm.org/D50568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339474 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-10 21:32:47 +00:00
Heejin Ahn 36f54002c9 [WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplemented
Summary:
i64x2 and f64x2 operations are not implemented in V8, so we normally
do not want to emit them. However, they are in the SIMD spec proposal,
so we still want to be able to test them in the toolchain. This patch
adds a flag to enable their emission.

Reviewers: aheejin, dschuff

Subscribers: sunfish, jgravelle-google, sbc100, llvm-commits

Differential Revision: https://reviews.llvm.org/D50423

Patch by Thomas Lively (tlively)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339407 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-09 23:58:51 +00:00
Derek Schuff 4f8862743a [WebAssembly] Update SIMD binary arithmetic
Add missing SIMD types (v2f64) and binary ops. Also adds
tablegen support for automatically prepending prefix byte to SIMD
opcodes.

Differential Revision: https://reviews.llvm.org/D50292

Patch by Thomas Lively

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339186 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-07 21:24:01 +00:00
Wouter van Oortmerssen bbe055241a Revert "[WebAssembly] Added default stack-only instruction mode for MC."
This reverts commit d3c9af4179eae7793d1487d652e2d4e23844555f.
(SVN revision 338164)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338176 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-27 23:19:51 +00:00
Wouter van Oortmerssen cc0c5b9ce0 [WebAssembly] Added default stack-only instruction mode for MC.
Summary:
Moved Explicit Locals pass to last.
Made that pass obligatory.
Made it convert from register to stack based instructions, and removed the registers.
Fixes to related code that was expecting register based instructions.
Added the correct testing flag to all tests, depending on what the
format they were expecting so far.
Translated one test to stack format as example: reg-stackify-stack.ll

tested:
llvm-lit -v `find test -name WebAssembly`
unittests/MC/*

Reviewers: dschuff, sunfish

Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D49160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338164 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-27 20:56:43 +00:00
Sam Clegg 8d1235ff26 [WebAsembly] Update default triple in test files to wasm32-unknown-unkown.
Summary: The final -wasm component has been the default for some time now.

Subscribers: jfb, dschuff, jgravelle-google, eraman, aheejin, JDevlieghere, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332007 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-10 17:49:11 +00:00
Dan Gohman 24efa5d42e [WebAssembly] Convert the remaining unit tests to the new wasm-object-file target.
To facilitate this, add a new hidden command-line option to disable
the explicit-locals pass. That causes llc to emit invalid code that doesn't
have all locals converted to get_local/set_local, however it simplifies
testwriting in many cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296540 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-28 23:37:04 +00:00
Derek Schuff 75834f76b2 [WebAssembly] Initial SIMD128 support.
Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4.

The spec is WIP, and might change in the near future.

Patch by João Porto

Differential Revision: https://reviews.llvm.org/D22686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277543 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 23:16:09 +00:00