15 Commits

Author SHA1 Message Date
Simon Pilgrim bcfcf2585d [X86][SSE] EltsFromConsecutiveLoads - ignore non-zero offset base loads (PR43227)
As discussed on D64551 and PR43227, we don't correctly handle cases where the base load has a non-zero byte offset.

Until we can properly handle this, we must bail from EltsFromConsecutiveLoads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371078 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-05 15:07:07 +00:00
Simon Pilgrim 9a745c9fa1 [X86][SSE] Add (failing) test case for PR43227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371061 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-05 12:36:11 +00:00
Simon Pilgrim 9a8e53339b [X86][SSE] Add shuffled load tests from PR16739
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369116 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-16 14:47:59 +00:00
Simon Pilgrim 9e6800ebfa Revert rL369112 : [X86][SSE] Add shuffled load tests from PR16739
I left typos in this from a WIP copy - reverting and I'll recommit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369115 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-16 14:31:45 +00:00
Simon Pilgrim 9cb033fcdc [X86][SSE] Add shuffled load tests from PR16739
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369112 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-16 14:26:11 +00:00
Craig Topper 9ef33c9301 Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
The assert that caused this to be reverted should be fixed now.

Original commit message:

This patch changes our defualt legalization behavior for 16, 32, and
64 bit vectors with i8/i16/i32/i64 scalar types from promotion to
widening. For example, v8i8 will now be widened to v16i8 instead of
promoted to v8i16. This keeps the elements widths the same and pads
with undef elements. We believe this is a better legalization strategy.
But it carries some issues due to the fragmented vector ISA. For
example, i8 shifts and multiplies get widened and then later have
to be promoted/split into vXi16 vectors.

This has the potential to cause regressions so we wanted to get
it in early in the 10.0 cycle so we have plenty of time to
address them.

Next steps will be to merge tests that explicitly test the command
line option. And then we can remove the option and its associated
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368183 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-07 16:24:26 +00:00
Mitch Phillips fcdae32ca1 Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."
This reverts commit 3de33245d2c992c9e0af60372043540b60f3a810.

This commit broke the MSan buildbots. See
https://reviews.llvm.org/rL367901 for more information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368107 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-06 23:00:43 +00:00
Craig Topper bd34ddf016 [X86] Enable -x86-experimental-vector-widening-legalization by default.
This patch changes our defualt legalization behavior for 16, 32, and
64 bit vectors with i8/i16/i32/i64 scalar types from promotion to
widening. For example, v8i8 will now be widened to v16i8 instead of
promoted to v8i16. This keeps the elements widths the same and pads
with undef elements. We believe this is a better legalization strategy.
But it carries some issues due to the fragmented vector ISA. For
example, i8 shifts and multiplies get widened and then later have
to be promoted/split into vXi16 vectors.

This has the potential to cause regressions so we wanted to get
it in early in the 10.0 cycle so we have plenty of time to
address them.

Next steps will be to merge tests that explicitly test the command
line option. And then we can remove the option and its associated
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367901 91177308-0d34-0410-b5e6-96231b3b80d8
2019-08-05 18:25:36 +00:00
Simon Pilgrim ea8885459e [X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)
This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load.

A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match.

Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle.

Fixed out of bounds load assert identified in rL366501

Differential Revision: https://reviews.llvm.org/D64551

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366681 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-22 12:44:10 +00:00
Simon Pilgrim 77469692cb [X86][SSE] Add EltsFromConsecutiveLoads test case identified in rL366501
Test case that led to rL366441 being reverted at rL366501

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366678 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-22 12:17:56 +00:00
Reid Kleckner b993353dc4 Revert [X86] EltsFromConsecutiveLoads - support common source loads
This reverts r366441 (git commit 48104ef7c9c653bbb732b66d7254957389fea337)

This causes clang to fail to compile some file in Skia. Reduction soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366501 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-18 21:26:41 +00:00
Simon Pilgrim 7dde04014c [X86] EltsFromConsecutiveLoads - support common source loads
This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load.

A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match.

Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle.

Differential Revision: https://reviews.llvm.org/D64551

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366441 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-18 14:33:25 +00:00
Simon Pilgrim cf10da4c22 [X86][SSE] EltsFromConsecutiveLoads - add basic dereferenceable support
This patch checks to see if the vector element loads are based off a dereferenceable pointer that covers the entire vector width, in which case we don't need to have element loads at both extremes of the vector width - just the start (base pointer) of it.

Another step towards partial vector loads......

Differential Revision: https://reviews.llvm.org/D64205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365614 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-10 10:46:36 +00:00
Simon Pilgrim 7c1a6dbf10 [X86][SSE] Add partial dereferenceable vector load test inspired by PR21780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365145 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-04 15:00:04 +00:00
Simon Pilgrim d09ba1b82b [X86][SSE] Add some partial dereferenceable vector load tests inspired by PR16739
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365138 91177308-0d34-0410-b5e6-96231b3b80d8
2019-07-04 13:31:49 +00:00