13 Commits

Author SHA1 Message Date
Simon Pilgrim 8ea1c2fe6a [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
This patch adds an initial x86 SimplifyDemandedVectorEltsForTargetNode implementation to handle target shuffles.

Currently the patch only decodes a target shuffle, calls SimplifyDemandedVectorElts on its input operands and removes any shuffle that reduces to undef/zero/identity.

Future work will need to integrate this with combineX86ShufflesRecursively, add support for other x86 ops, etc.

NOTE: There is a minor regression that appears to be affecting further (extractelement?) combines which I haven't been able to solve yet - possibly something to do with how nodes are added to the worklist after simplification.

Differential Revision: https://reviews.llvm.org/D52140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342564 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-19 18:11:34 +00:00
Simon Pilgrim 2a529f7aa0 [X86][SSE] Combine (some) target shuffles with multiple uses
As discussed on D41794, we have many cases where we fail to combine shuffles as the input operands have other uses.

This patch permits these shuffles to be combined as long as they don't introduce additional variable shuffle masks, which should reduce instruction dependencies and allow the total number of shuffles to still drop without increasing the constant pool.

However, this may mean that some memory folds may no longer occur, and on pre-AVX require the occasional extra register move.

This also exposes some poor PMULDQ/PMULUDQ codegen which was doing unnecessary upper/lower calculations which will in fact fold to zero/undef - the fix will be added in a followup commit.

Differential Revision: https://reviews.llvm.org/D50328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339335 91177308-0d34-0410-b5e6-96231b3b80d8
2018-08-09 12:30:02 +00:00
Francis Visoiu Mistrih ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Ayman Musa 1ebb1b7a38 [X86][SSE2] Fix asm string for movq (Move Quadword) instruction.
Replace "mov{d|q}" with "movq".

Differential Revision: https://reviews.llvm.org/D32220



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301386 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-26 07:08:44 +00:00
Simon Pilgrim a533d6cc52 [X86][SSE] Fix domains for VZEXT_LOAD type instructions
Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions.

Differential Revision: https://reviews.llvm.org/D27684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289825 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 16:05:29 +00:00
Simon Pilgrim c9b8f68005 [X86][SSE] Regenerated the vec_insert tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265179 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-01 19:42:23 +00:00
Sanjay Patel 5ff9d3e6ed loosen checking for buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:30:18 +00:00
Sanjay Patel 50652e746b fixed test to use FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-06 21:16:15 +00:00
Rafael Espindola 4aa8bdaa46 Rename features to match what gcc and clang use.
There is no advantage in being different and using the same names simplifies
clang a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 20:21:34 +00:00
Dan Gohman 36a0947820 Eliminate more uses of llvm-as and llvm-dis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:54:48 +00:00
Evan Cheng 52ceafa5c7 Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:08 +00:00
Evan Cheng f26ffe987c Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 08:22:04 +00:00
Evan Cheng 794405e6aa Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44929 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-12 07:55:34 +00:00