1 Commits

Author SHA1 Message Date
Changpeng Fang
837d4755cd AMDGPU: Add Selection patterns to support add of one bit.
Summary:
  We generate s_xor to lower add of i1s in general cases, and s_not to
lower add with a one-bit imm of -1 (true).

Reviewers:
  rampitec

Differential Revision:
  https://reviews.llvm.org/D52518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343030 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-25 21:21:18 +00:00