132 Commits

Author SHA1 Message Date
Clement Courbet
1fe90de461 Re-land part of r354244 "[DAGCombiner] Eliminate dead stores to stack."
This part introduces the lifetime node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354578 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-21 12:59:36 +00:00
Clement Courbet
3cfd39d61c Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
Breaks some bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354245 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-18 08:24:29 +00:00
Clement Courbet
89d8d90473 [DAGCombiner] Eliminate dead stores to stack.
Summary:
A store to an object whose lifetime is about to end can be removed.

See PR40550 for motivation.

Reviewers: niravd

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D57541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354244 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-18 07:59:01 +00:00
Craig Topper
e3696113b6 Implementation of asm-goto support in LLVM
This patch accompanies the RFC posted here:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/127239.html

This patch adds a new CallBr IR instruction to support asm-goto
inline assembly like gcc as used by the linux kernel. This
instruction is both a call instruction and a terminator
instruction with multiple successors. Only inline assembly
usage is supported today.

This also adds a new INLINEASM_BR opcode to SelectionDAG and
MachineIR to represent an INLINEASM block that is also
considered a terminator instruction.

There will likely be more bug fixes and optimizations to follow
this, but we felt it had reached a point where we would like to
switch to an incremental development model.

Patch by Craig Topper, Alexander Ivchenko, Mikhail Dvoretckii

Differential Revision: https://reviews.llvm.org/D53765

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353563 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-08 20:48:56 +00:00
Leonard Chan
18c82e623e [Intrinsic] Unsigned Fixed Point Multiplication Intrinsic
Add an intrinsic that takes 2 unsigned integers with the scale of them
provided as the third argument and performs fixed point multiplication on
them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D55625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353059 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-04 17:18:11 +00:00
Craig Topper
18cdc34be8 [X86] Update SelectionDAGDumper to print the extension type and expanding flag for masked loads. Add truncating and compressing for masked stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352029 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-24 07:51:34 +00:00
Matt Arsenault
1f5f9eca96 Codegen support for atomicrmw fadd/fsub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351851 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-22 18:36:06 +00:00
Chandler Carruth
6b547686c5 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-19 08:50:56 +00:00
Bjorn Pettersson
8bca926519 [SelectionDAG] Updates for -dag-dump-verbose
Summary:
This patch makes some changes related to -dag-dump-verbose.
Main use case has been when debugging how SelectionDAG is
dealing with debug info (SDDbgValue nodes).

1) We now print the number of DbgValues that are mapped to each
   SDNode.
2) Removed duplicated printing of DebugLoc (nowadays DebugLoc is
   printed also when not using -dag-dump-verbose).
3) Renamed SDDbgValue::dump to SDDbgValue::print, and added a
   new SDDbgValue::dump that will start a new line after calling
   print.
4) SDDbgValue::print now prints "Order", and it also prints
   some additional information when kind is CONST/FRAMEIX/VREG.
5) SelectionDAG::dump() now dumps all SDDbgValue nodes after
   the list of SDNodes (both "regular" and "ByVal" SDDbgValue:s).
   Invalidated nodes are not printed.
6) Prohibit inline printing of SDNode operands that has SDDbgValue
   nodes associated to them.

Reviewers: jmorse, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D56793

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351581 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-18 20:06:13 +00:00
Leonard Chan
8e3fdeb3b8 [Intrinsic] Signed Fixed Point Multiplication Intrinsic
Add an intrinsic that takes 2 signed integers with the scale of them provided
as the third argument and performs fixed point multiplication on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D54719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348912 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-12 06:29:14 +00:00
Simon Pilgrim
67f4757dce [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)
This is an initial patch to add a minimum level of support for funnel shifts to the SelectionDAG and to begin wiring it up to the X86 SHLD/SHRD instructions.

Some partial legalization code has been added to handle the case for 'SlowSHLD' where we want to expand instead and I've added a few DAG combines so we don't get regressions from the existing DAG builder expansion code.

Differential Revision: https://reviews.llvm.org/D54698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348353 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-05 11:12:12 +00:00
Cameron McInally
7c442634fa [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics
Differential Revision: https://reviews.llvm.org/D53411



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346141 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-05 15:59:49 +00:00
Mandeep Singh Grang
08238b7fa9 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Patch by: Yin Ma (yinma@codeaurora.org)

Reviewers: mgrang, ssijaric, eli.friedman, TomTan, mstorsjo, rnk, compnerd, efriedma

Reviewed By: efriedma

Subscribers: efriedma, javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53996

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345909 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-01 23:22:25 +00:00
Mandeep Singh Grang
fb61af32fa Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"
This reverts commit 585b6667b4712e3c7f32401e929855b3313b4ff2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345863 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-01 17:53:57 +00:00
Mandeep Singh Grang
585b6667b4 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Reviewers: mgrang, TomTan, rnk, compnerd, mstorsjo, efriedma

Reviewed By: efriedma

Subscribers: majnemer, chrib, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53673

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345791 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-31 23:16:20 +00:00
Cameron McInally
3277e77bfd [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUM
Differential Revision: https://reviews.llvm.org/D53216



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345650 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-30 21:01:29 +00:00
Leonard Chan
5aeb36fdcb [Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics
Add an intrinsic that takes 2 integers and perform saturation subtraction on
them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345512 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-29 16:54:37 +00:00
Thomas Lively
bbc2ea9b21 [NFC] Rename minnan and maxnan to minimum and maximum
Summary:
Changes all uses of minnan/maxnan to minimum/maximum
globally. These names emphasize that the semantic difference between
these operations is more than just NaN-propagation.

Reviewers: arsenm, aheejin, dschuff, javed.absar

Subscribers: jholewinski, sdardis, wdng, sbc100, jgravelle-google, jrtc27, atanasyan, llvm-commits

Differential Revision: https://reviews.llvm.org/D53112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345218 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-24 22:49:55 +00:00
Leonard Chan
152aae5d0d [Intrinsic] Unigned Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform unsigned saturation
addition on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53340

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344971 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-22 23:08:40 +00:00
Matt Arsenault
c0db9a7416 DAG: Change behavior of fminnum/fmaxnum nodes
Introduce new versions that follow the IEEE semantics
to help with legalization that may need quieted inputs.

There are some regressions from inserting unnecessary
canonicalizes when these are matched from fast math
fcmp + select which should be fixed in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344914 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-22 16:27:27 +00:00
Leonard Chan
b325eb110c [Intrinsic] Signed Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform saturation addition on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344629 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-16 17:35:41 +00:00
Sanjay Patel
9d4952d6a5 [DAGCombiner] try to convert pow(x, 1/3) to cbrt(x)
This is a follow-up suggested in D51630 and originally proposed as an IR transform in D49040.

Copying the motivational statement by @evandro from that patch:
"This transformation helps some benchmarks in SPEC CPU2000 and CPU2006, such as 188.ammp, 
447.dealII, 453.povray, and especially 300.twolf, as well as some proprietary benchmarks. 
Otherwise, no regressions on x86-64 or A64."

I'm proposing to add only the minimum support for a DAG node here. Since we don't have an 
LLVM IR intrinsic for cbrt, and there are no other DAG ways to create a FCBRT node yet, I 
don't think we need to worry about DAG builder, legalization, a strict variant, etc. We 
should be able to expand as needed when adding more functionality/transforms. For reference, 
these are transform suggestions currently listed in SimplifyLibCalls.cpp:

//   * cbrt(expN(X))  -> expN(x/3)
//   * cbrt(sqrt(x))  -> pow(x,1/6)
//   * cbrt(cbrt(x))  -> pow(x,1/9)

Also, given that we bail out on long double for now, there should not be any logical 
differences between platforms (unless there's some platform out there that has pow()
but not cbrt()).

Differential Revision: https://reviews.llvm.org/D51753


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342348 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-16 16:50:26 +00:00
Adrian Prantl
71e86497f4 fix noasserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342247 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-14 17:32:52 +00:00
Adrian Prantl
b804bf5cf4 SelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342245 91177308-0d34-0410-b5e6-96231b3b80d8
2018-09-14 17:08:02 +00:00
Amaury Sechet
7436bb683e Get rid of SETCCE
Summary: It has been deprecated in favor of SETCCCARRY for a year now and isn't used by any in tree backend.

Reviewers: efriedma, craig.topper, dblaikie, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47685

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333939 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-04 18:36:22 +00:00
Michael Berg
eb53cf7275 Fast Math Flag mapping into SDNode
Summary: Adding support for Fast flags in the SDNode to leverage fast math sub flag usage.

Reviewers: spatel, arsenm, jbhateja, hfinkel, escha, qcolombet, echristo, wristow, javed.absar

Reviewed By: spatel

Subscribers: llvm-commits, rampitec, nhaehnle, tstellar, FarhanaAleen, nemanjai, javed.absar, jbhateja, hfinkel, wdng

Differential Revision: https://reviews.llvm.org/D45710

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331547 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-04 18:48:20 +00:00
Nico Weber
0f38c60baf IWYU for llvm-config.h in llvm, additions.
See r331124 for how I made a list of files missing the include.
I then ran this Python script:

    for f in open('filelist.txt'):
        f = f.strip()
        fl = open(f).readlines()

        found = False
        for i in xrange(len(fl)):
            p = '#include "llvm/'
            if not fl[i].startswith(p):
                continue
            if fl[i][len(p):] > 'Config':
                fl.insert(i, '#include "llvm/Config/llvm-config.h"\n')
                found = True
                break
        if not found:
            print 'not found', f
        else:
            open(f, 'w').write(''.join(fl))

and then looked through everything with `svn diff | diffstat -l | xargs -n 1000 gvim -p`
and tried to fix include ordering and whatnot.

No intended behavior change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331184 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-30 14:59:11 +00:00
Vedant Kumar
aeb3e4fcbb [SelectionDAG] Dump debug locs in SDNodes
This helps debug issues where selection-dag assigns the wrong location
to an instruction.

Differential Revision: https://reviews.llvm.org/D45913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330618 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-23 17:18:24 +00:00
Francis Visoiu Mistrih
224d082089 [CodeGen] Allow printing MachineMemOperands with less context in SDAGDumper
Don't assume SelectionDAG is non-null as the targets can use it with a
null pointer.

Differential Revision: https://reviews.llvm.org/D44611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329908 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-12 12:59:50 +00:00
Craig Topper
f137ed238d [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer.
Currently EVT is in the IR layer only because of Function.cpp needing a very small piece of the functionality of EVT::getEVTString(). The rest of EVT is used in codegen making CodeGen a better place for it.

The previous code converted a Type* to EVT and then called getEVTString. This was only expected to handle the primitive types from Type*. Since there only a few primitive types, we can just print them as strings directly.

Differential Revision: https://reviews.llvm.org/D45017

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328806 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-29 17:21:10 +00:00
David Blaikie
b91d9a7128 Fix layering by moving ValueTypes.h from CodeGen to IR
ValueTypes.h is implemented in IR already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328397 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 23:58:31 +00:00
David Blaikie
9d9a46a465 Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328395 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 23:58:25 +00:00
Francis Visoiu Mistrih
0d758f3663 [CodeGen] Use MIR syntax for MachineMemOperand printing
Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)".

rdar://38163529

Differential Revision: https://reviews.llvm.org/D42377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327580 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-14 21:52:13 +00:00
Alexander Timofeev
77d8d0a7e7 Pass Divergence Analysis data to Selection DAG to drive divergence
dependent instruction selection.

Differential revision: https://reviews.llvm.org/D35267

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326703 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-05 15:12:21 +00:00
Oliver Stannard
4c334a7e90 [AArch64] Improve v8.1-A code-gen for atomic load-and
Armv8.1-A added an atomic load-clear instruction (which performs bitwise
and with the complement of it's operand), but not a load-and
instruction. Our current code-generation for atomic load-and always
inserts an MVN instruction to invert its argument, even if it could be
folded into a constant or another instruction.

This adds lowering early in selection DAG to convert a load-and
operation into an xor with -1 and a load-clear, allowing the normal DAG
optimisations to work on it.

To do this, I've had to add a new ISD opcode, ATOMIC_LOAD_CLR. I don't
see any easy way to do this with an AArch64-specific ISD node, because
the code-generation for atomic operations assumes the SDNodes are of
type AtomicSDNode.

I've left the old tablegen patterns in because they are still needed for
global isel.

Differential revision: https://reviews.llvm.org/D42478



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324908 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-12 17:03:11 +00:00
Andrew Kaylor
89348bbca7 Add SelectionDAGDumper support for strict FP nodes
Patch by Kevin P. Neal



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324416 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-06 22:28:15 +00:00
Francis Visoiu Mistrih
accb337c76 [CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
  Function names should be verb phrases (as they represent actions), and
  command-like function should be imperative. The name should be camel
  case, and start with a lower case letter (e.g. openFile() or isFoo()).

Differential Revision: https://reviews.llvm.org/D40416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319168 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-28 12:42:37 +00:00
David Blaikie
e3a9b4ce3a Fix a bunch more layering of CodeGen headers that are in Target
All these headers already depend on CodeGen headers so moving them into
CodeGen fixes the layering (since CodeGen depends on Target, not the
other way around).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318490 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-17 01:07:10 +00:00
David Blaikie
48319238e4 Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering
This header includes CodeGen headers, and is not, itself, included by
any Target headers, so move it into CodeGen to match the layering of its
implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317647 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-08 01:01:31 +00:00
Aaron Ballman
1d03d382c1 Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people.
Error LNK2019 unresolved external symbol "public: void __cdecl `anonymous namespace'::MatchableInfo::dump(void)const " (?dump@MatchableInfo@?A0xf4f1c304@@QEBAXXZ) referenced in function "public: void __cdecl `anonymous namespace'::AsmMatcherEmitter::run(class llvm::raw_ostream &)" (?run@AsmMatcherEmitter@?A0xf4f1c304@@QEAAXAEAVraw_ostream@llvm@@@Z) llvm-tblgen D:\llvm\2017\utils\TableGen\AsmMatcherEmitter.obj 1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315854 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-15 14:32:27 +00:00
Matt Arsenault
0797a9c4c1 DAG: Add flags to dumps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315690 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 15:41:40 +00:00
Don Hinton
5298935fe7 [dump] Remove NDEBUG from test to enable dump methods [NFC]
Summary:
Add LLVM_FORCE_ENABLE_DUMP cmake option, and use it along with
LLVM_ENABLE_ASSERTIONS to set LLVM_ENABLE_DUMP.

Remove NDEBUG and only use LLVM_ENABLE_DUMP to enable dump methods.

Move definition of LLVM_ENABLE_DUMP from config.h to llvm-config.h so
it'll be picked up by public headers.

Differential Revision: https://reviews.llvm.org/D38406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315590 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-12 16:16:06 +00:00
Eugene Zelenko
887aef72f3 [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315380 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 22:33:29 +00:00
Chandler Carruth
e3e43d9d57 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304787 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 11:49:48 +00:00
Amaury Sechet
0247f749b8 Do not legalize large setcc with setcce, introduce setcccarry and do it with usubo/setcccarry.
Summary:
This is a continuation of the work started in D29872 . Passing the carry down as a value rather than as a glue allows for further optimizations. Introducing setcccarry makes the use of addc/subc unecessary and we can start the removal process.

This patch only introduce the optimization strictly required to get the same level of optimization as was available before nothing more.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304404 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-01 11:14:17 +00:00
Amara Emerson
8f1f7ce9d1 Introduce experimental generic intrinsics for horizontal vector reductions.
- This change allows targets to opt-in to using them instead of the log2
  shufflevector algorithm.
- The SLP and Loop vectorizers have the common code to do shuffle reductions
  factored out into LoopUtils, and now have a unified interface for generating
  reductions regardless of the preference of the target. LoopUtils now uses TTI
  to determine what kind of reductions the target wants to handle.
- For CodeGen, basic legalization support is added.

Differential Revision: https://reviews.llvm.org/D30086



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302514 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-09 10:43:25 +00:00
Amaury Sechet
bcb9816097 Do not legalize large add with addc/adde, introduce addcarry and do it with uaddo/addcarry
Summary: As per discution on how to get better codegen an large int legalization, it became clear that using a glue for the carry was preventing several desirable optimizations. Passing the carry down as a value allow for more flexibility.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301775 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-30 19:24:09 +00:00
Quentin Colombet
1da12ea840 Revert "Instrument SDISel C++ patterns"
This reverts commit r299284.

Didn't intend to commit this :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299286 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 01:26:17 +00:00
Quentin Colombet
9ca9c4340d Instrument SDISel C++ patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299284 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-01 01:21:32 +00:00
Simon Pilgrim
e35265b998 [SelectionDAG] Add a signed integer absolute ISD node
Reduced version of D26357 - based on the discussion on llvm-dev about canonicalization of UMIN/UMAX/SMIN/SMAX as well as ABS I've reduced that patch to just the ABS ISD node (with x86/sse support) to improve basic combines and lowering.

ARM/AArch64, Hexagon, PowerPC and NVPTX all have similar instructions allowing us to make this a generic opcode and move away from the hard coded tablegen patterns which makes it tricky to match more complex patterns.

At the moment this patch doesn't attempt legalization as we only create an ABS node if its legal/custom.

Differential Revision: https://reviews.llvm.org/D29639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297780 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-14 21:26:58 +00:00