395 Commits

Author SHA1 Message Date
Sanjay Patel
b6e263b5df [InstCombine] don't form select from logic ops if it's unlikely that we'll eliminate any ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274926 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 20:53:29 +00:00
Sanjay Patel
48900dfffa [InstCombine] check for one-use before turning simple logic op into a select
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274891 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 17:26:47 +00:00
Sanjay Patel
0be32ace8c [InstCombine] allow or(sext(A), B) --> A ? -1 : B transform for vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274883 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 17:01:15 +00:00
Sanjay Patel
2f457b8690 [InstCombine] use ConstantExpr::getBitCast() instead of creating useless instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274229 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 14:27:41 +00:00
Sanjay Patel
30bf9cacd9 [InstCombine] extend matchSelectFromAndOr() to work with i1 scalar types
If the incoming types are i1, then we don't have to pattern match any sext ops.

Differential Revision: http://reviews.llvm.org/D21740



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274228 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 14:18:18 +00:00
Tim Shen
b76b4707be [InstCombine] Simplify and correct folding fcmps with the same children
Summary: Take advantage of FCmpInst::Predicate's bit pattern and handle (fcmp *, x, y) | (fcmp *, x, y) and (fcmp *, x, y) & (fcmp *, x, y) more consistently. Also fold more FCmpInst::FCMP_FALSE and FCmpInst::FCMP_TRUE to constants.

Currently InstCombine wrongly folds (fcmp ogt, x, y) | (fcmp ord, x, y) to (fcmp ogt, x, y); this patch also fixes that.

Reviewers: spatel

Subscribers: llvm-commits, iteratee, echristo

Differential Revision: http://reviews.llvm.org/D21775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274156 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-29 20:10:17 +00:00
Tim Shen
1c953b5f86 [InstCombine, NFC] Change the generated variable names by creating new instructions
This removes some noise for D21775's test changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274155 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-29 20:10:13 +00:00
Sanjay Patel
cc2e81eaf2 [InstCombine] refactor optional bitcasting in matchSelectFromAndOr() into one code path (NFCI)
Tests to verify that the commuted variants are all exercised were added with:
http://reviews.llvm.org/rL273702


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273706 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 18:55:27 +00:00
Sanjay Patel
efe34a4c9d [InstCombine] consolidate commutation variants of matchSelectFromAndOr() in one place; NFCI
By putting all the possible commutations together, we simplify the code.
Note that this is NFCI, but I'm adding tests that actually exercise each
commutation pattern because we don't have this anywhere else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273702 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 18:26:02 +00:00
Sanjay Patel
832e25415d [InstSimplify] analyze (optionally casted) icmps to eliminate obviously false logic (PR27869)
By moving this transform to InstSimplify from InstCombine, we sidestep the problem/question
raised by PR27869:
https://llvm.org/bugs/show_bug.cgi?id=27869
...where InstCombine turns an icmp+zext into a shift causing us to miss the fold.

Credit to David Majnemer for a draft patch of the changes to InstructionSimplify.cpp.

Differential Revision: http://reviews.llvm.org/D21512



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273200 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-20 20:59:59 +00:00
Sanjay Patel
33ec7804e1 [InstCombine] look through bitcasts to find selects
There was concern that creating bitcasts for the simpler potential select pattern:

define <2 x i64> @vecBitcastOp1(<4 x i1> %cmp, <2 x i64> %a) {
  %a2 = add <2 x i64> %a, %a
  %sext = sext <4 x i1> %cmp to <4 x i32>
  %bc = bitcast <4 x i32> %sext to <2 x i64>
  %and = and <2 x i64> %a2, %bc
  ret <2 x i64> %and
}

might lead to worse code for some targets, so this patch is matching the larger
patterns seen in the test cases.

The motivating example for this patch is this IR produced via SSE intrinsics in C:

define <2 x i64> @gibson(<2 x i64> %a, <2 x i64> %b) {
  %t0 = bitcast <2 x i64> %a to <4 x i32>
  %t1 = bitcast <2 x i64> %b to <4 x i32>
  %cmp = icmp sgt <4 x i32> %t0, %t1
  %sext = sext <4 x i1> %cmp to <4 x i32>
  %t2 = bitcast <4 x i32> %sext to <2 x i64>
  %and = and <2 x i64> %t2, %a
  %neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
  %neg2 = bitcast <4 x i32> %neg to <2 x i64>
  %and2 = and <2 x i64> %neg2, %b
  %or = or <2 x i64> %and, %and2
  ret <2 x i64> %or
}

For an AVX target, this is currently:

vpcmpgtd  %xmm1, %xmm0, %xmm2
vpand     %xmm0, %xmm2, %xmm0
vpandn    %xmm1, %xmm2, %xmm1
vpor      %xmm1, %xmm0, %xmm0
retq

With this patch, it becomes:

vpmaxsd   %xmm1, %xmm0, %xmm0

Differential Revision: http://reviews.llvm.org/D20774



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271676 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-03 14:42:07 +00:00
Sanjay Patel
a96468b9ad transform obscured FP sign bit ops into a fabs/fneg using TLI hook
This is effectively a revert of:
http://reviews.llvm.org/rL249702 - [InstCombine] transform masking off of an FP sign bit into a fabs() intrinsic call (PR24886)
and:
http://reviews.llvm.org/rL249701 - [ValueTracking] teach computeKnownBits that a fabs() clears sign bits
and a reimplementation as a DAG combine for targets that have IEEE754-compliant fabs/fneg instructions.

This is intended to resolve the objections raised on the dev list:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098154.html
and:
https://llvm.org/bugs/show_bug.cgi?id=24886#c4

In the interest of patch minimalism, I've only partly enabled AArch64. PowerPC, MIPS, x86 and others can enable later.

Differential Revision: http://reviews.llvm.org/D19391



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271573 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-02 20:01:37 +00:00
Sanjay Patel
c704447abe [InstCombine] remove guard for generating a vector select
This is effectively NFC because we already do this transform after r175380:
http://reviews.llvm.org/rL175380

and also via foldBoolSextMaskToSelect().

This change should just make it a bit more efficient to match the pattern. 
The original guard was added in r95058:
http://reviews.llvm.org/rL95058

A sampling of codegen for current in-tree targets shows no problems. This
makes sense given that we're already producing the vector selects via the
other transforms.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271554 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-02 18:03:05 +00:00
Sanjay Patel
1d110c83c2 [InstCombine] move and/sext fold to helper function; NFCI
We need to enhance the pattern matching on these to look through bitcasts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271051 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-27 21:41:29 +00:00
Chad Rosier
c0a787d682 [InstCombine] Catch more bswap cases missed due to zext and truncs.
Fixes PR27824.
Differential Revision: http://reviews.llvm.org/D20591.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270853 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-26 14:58:51 +00:00
Chad Rosier
b744845677 Clarify that we match BSwap in InstCombine and BitReverse in CGP. NFC.
Also, rename recognizeBitReverseOrBSwapIdiom to recognizeBSwapOrBitReverseIdiom,
so the ordering of the MatchBSwaps and MatchBitReversals arguments are
consistent with the function name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270715 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-25 16:22:14 +00:00
Chad Rosier
2ebc9f6346 Typo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268975 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-09 21:37:43 +00:00
Etienne Bergeron
68aaa747f9 Cleanup redundant expression in InstCombineAndOrXor.
Summary:
The expression is redundant on both side of operator |.

detected by : http://reviews.llvm.org/D19451

Reviewers: rnk, majnemer

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267458 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-25 20:15:33 +00:00
Sanjay Patel
76b12c4bf0 [InstCombine] transform bitcasted bitwise logic ops with constants (PR26702)
Given that we're not actually reducing the instruction count in the included
regression tests, I think we would call this a canonicalization step.

The motivation comes from the example in PR26702:
https://llvm.org/bugs/show_bug.cgi?id=26702

If we hoist the bitwise logic ahead of the bitcast, the previously unoptimizable
example of:

define <4 x i32> @is_negative(<4 x i32> %x) {
  %lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
  %not = xor <4 x i32> %lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
  %bc = bitcast <4 x i32> %not to <2 x i64>
  %notnot = xor <2 x i64> %bc, <i64 -1, i64 -1>
  %bc2 = bitcast <2 x i64> %notnot to <4 x i32>
  ret <4 x i32> %bc2
}

Simplifies to the expected:

define <4 x i32> @is_negative(<4 x i32> %x) {
  %lobit = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
  ret <4 x i32> %lobit
}

Differential Revision: http://reviews.llvm.org/D17583



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262645 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-03 19:19:04 +00:00
Sanjay Patel
221d7512d8 [InstCombine] enable optimization of casted vector xor instructions
This is part of the payoff for the refactoring in:
http://reviews.llvm.org/rL261649
http://reviews.llvm.org/rL261707

In addition to removing a pile of duplicated code, the xor case was
missing the optimization for vector types because it checked
"SrcTy->isIntegerTy()" rather than "SrcTy->isIntOrIntVectorTy()"
like 'and' and 'or' were already doing.

This solves part of:
https://llvm.org/bugs/show_bug.cgi?id=26702



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261750 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-24 17:00:34 +00:00
Sanjay Patel
246537be50 [InstCombine] refactor visitOr() to use foldCastedBitwiseLogic()
Note: The 'and' case in foldCastedBitwiseLogic() is inheriting one extra
check from the nearly identical 'or' case:
  if ((!isa<ICmpInst>(Cast0Src) || !isa<ICmpInst>(Cast1Src))

But I'm not sure how to expose that difference in a regression test. 
Without that check, the 'or' path will infinite loop on:
test/Transforms/InstCombine/zext-or-icmp.ll
because the zext-or-icmp fold is attempting a reverse transform.

The refactoring should extend to the 'xor' case next to solve part of
PR26702.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261707 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 23:56:23 +00:00
Sanjay Patel
7126878363 [InstCombine] improve readability ; NFCI
Less indenting, named local variables, more descriptive names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261659 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 17:41:34 +00:00
Sanjay Patel
a10a4f18bf [InstCombine] less indenting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261652 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 16:59:21 +00:00
Sanjay Patel
81780147e7 [InstCombine] add helper function to foldCastedBitwiseLogic() ; NFCI
This is a straight cut and paste of the existing code and is intended to
be the first step in solving part of PR26702:
https://llvm.org/bugs/show_bug.cgi?id=26702

We should be able to reuse most of this and delete the nearly identical 
existing code in visitOr(). Then, we can enhance visitXor() to use the
same code too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261649 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 16:36:07 +00:00
Sanjay Patel
7d0cdb4a10 function names start with a lowercase letter; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259425 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-01 22:23:39 +00:00
Sanjay Patel
e388c328c2 combine clauses with same output ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258062 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-18 19:17:58 +00:00
Sanjay Patel
33205ca7b3 use m_OneUse ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258059 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-18 18:36:38 +00:00
Sanjay Patel
671ebc065d fix variable names, typos ; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258058 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-18 18:28:09 +00:00
Sanjay Patel
a0552b5549 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258057 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-18 17:50:23 +00:00
James Molloy
cd54bb4874 [InstCombine] Rewrite bswap/bitreverse handling completely.
There are several requirements that ended up with this design;
  1. Matching bitreversals is too heavyweight for InstCombine and doesn't really need to be done so early.
  2. Bitreversals and byteswaps are very related in their matching logic.
  3. We want to implement support for matching more advanced bswap/bitreverse patterns like partial bswaps/bitreverses.
  4. Bswaps are best matched early in InstCombine.

The result of these is that a new utility function is created in Transforms/Utils/Local.h that can be configured to search for bswaps, bitreverses or both. InstCombine uses it to find only bswaps, CGP uses it to find only bitreversals.

We can then extend the matching logic in one place only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257875 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 09:20:19 +00:00
Sanjay Patel
59dc7be11d getParent() ^ 3 == getModule() ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255511 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-14 17:24:23 +00:00
James Molloy
e153879648 [InstCombine] Make MatchBSwap also match bit reversals
MatchBSwap has most of the functionality to match bit reversals already. If we switch it from looking at bytes to individual bits and remove a few early exits, we can extend the main recursive function to match any sequence of ORs, ANDs and shifts that assemble a value from different parts of another, base value. Once we have this bit->bit mapping, we can very simply detect if it is appropriate for a bswap or bitreverse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255334 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-11 10:04:51 +00:00
David Majnemer
26a5db075f Do (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1 rather than (A == C1 || A == C2) -> (A | (C1 ^ C2)) == C2 when C1 ^ C2 is a power of 2.
Differential Revision: http://reviews.llvm.org/D14223

Patch by Amaury SECHET!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254518 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-02 16:15:07 +00:00
Sanjay Patel
0317b8efaf [InstCombine] transform masking off of an FP sign bit into a fabs() intrinsic call (PR24886)
This is a partial fix for PR24886:
https://llvm.org/bugs/show_bug.cgi?id=24886

Without this IR transform, the backend (x86 at least) was producing inefficient code.

This patch is making 2 assumptions:

    1. The canonical form of a fabs() operation is, in fact, the LLVM fabs() intrinsic.
    2. The high bit of an FP value is always the sign bit; as noted in the bug report, this isn't specified by the LangRef.

Differential Revision: http://reviews.llvm.org/D13076



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249702 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-08 17:09:31 +00:00
Sanjay Patel
358e408841 [InstCombine] match De Morgan's Law hidden by zext ops (PR22723)
This is a fix for PR22723:
https://llvm.org/bugs/show_bug.cgi?id=22723

My first attempt at this was to change what I thought was the root problem:

xor (zext i1 X to i32), 1 --> zext (xor i1 X, true) to i32

...but we create the opposite pattern in InstCombiner::visitZExt(), so infinite loop!

My next idea was to fix the matchIfNot() implementation in PatternMatch, but that would
mean potentially returning a different size for the match than what was input. I think
this would require all users of m_Not to check the size of the returned match, so I 
abandoned that idea.

I settled on just fixing the exact case presented in the PR. This patch does allow the
2 functions in PR22723 to compile identically (x86):

bool test(bool x, bool y) { return !x | !y; }
bool test(bool x, bool y) { return !x || !y; }
...
andb	%sil, %dil
xorb	$1, %dil
movb	%dil, %al
retq

Differential Revision: http://reviews.llvm.org/D12705



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-25 23:21:38 +00:00
Charlie Turner
424da54881 [InstCombine] Recognize another bswap idiom.
Summary:
The byte-swap recognizer can now notice that this

```
uint32_t bswap(uint32_t x)
{
  x = (x & 0x0000FFFF) << 16 | (x & 0xFFFF0000) >> 16;
  x = (x & 0x00FF00FF) << 8 | (x & 0xFF00FF00) >> 8;
  return x;
}
```
    
is a bswap. Fixes PR23863.

Reviewers: nlewycky, hfinkel, hans, jmolloy, rengolin

Subscribers: majnemer, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D12637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-24 10:24:58 +00:00
Sanjay Patel
8a6f3c5646 refactor matches for De Morgan's Laws; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-08 20:14:13 +00:00
Sanjay Patel
20a294ea5b remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-08 18:24:36 +00:00
Balaram Makam
b2026a6a18 Optimize bitwise even/odd test (-x&1 -> x&1) to not use negation.
Summary: We know that -x & 1 is equivalent to x & 1, avoid using negation for testing if a negative integer is even or odd.

Reviewers: majnemer

Subscribers: junbuml, mssimpso, gberry, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D12156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245569 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-20 15:35:00 +00:00
Nick Lewycky
b98e71a227 Fix a crash where a utility function wasn't aware of fcmp vectors and created a value with the wrong type. Fixes PR24458!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 22:46:49 +00:00
Sanjoy Das
da5f3a3ca5 [ConstantRange] Split makeICmpRegion in two.
Summary:
This change splits `makeICmpRegion` into `makeAllowedICmpRegion` and
`makeSatisfyingICmpRegion` with slightly different contracts.  The first
one is useful for determining what values some expression //may// take,
given that a certain `icmp` evaluates to true.  The second one is useful
for determining what values are guaranteed to //satisfy// a given
`icmp`.

Reviewers: nlewycky

Reviewed By: nlewycky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 00:41:24 +00:00
Mehdi Amini
529919ff31 DataLayout is mandatory, update the API to reflect it with references.
Summary:
Now that the DataLayout is a mandatory part of the module, let's start
cleaning the codebase. This patch is a first attempt at doing that.

This patch is not exactly NFC as for instance some places were passing
a nullptr instead of the DataLayout, possibly just because there was a
default value on the DataLayout argument to many functions in the API.
Even though it is not purely NFC, there is no change in the
validation.

I turned as many pointer to DataLayout to references, this helped
figuring out all the places where a nullptr could come up.

I had initially a local version of this patch broken into over 30
independant, commits but some later commit were cleaning the API and
touching part of the code modified in the previous commits, so it
seemed cleaner without the intermediate state.

Test Plan:

Reviewers: echristo

Subscribers: llvm-commits

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-10 02:37:25 +00:00
Sanjoy Das
f922d9cfe4 New instcombine rule: max(~a,~b) -> ~min(a, b)
This case is interesting because ScalarEvolutionExpander lowers min(a,
b) as ~max(~a,~b).  I think the profitability heuristics can be made
more clever/aggressive, but this is a start.

Differential Revision: http://reviews.llvm.org/D7821



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230285 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-24 00:08:41 +00:00
Benjamin Kramer
d038a7fe67 InstCombine: Allow folding of xor into icmp by changing the predicate for vectors
The loop vectorizer can create this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-12 20:26:46 +00:00
Chandler Carruth
884f263eab [PM] Rename InstCombine.h to InstCombineInternal.h in preparation for
creating a non-internal header file for the InstCombine pass.

I thought about calling this InstCombiner.h or in some way more clearly
associating it with the InstCombiner clas that it is primarily defining,
but there are several other utility interfaces defined within this for
InstCombine. If, in the course of refactoring, those end up moving
elsewhere or going away, it might make more sense to make this the
combiner's header alone.

Naturally, this is a bikeshed to a certain degree, so feel free to lobby
for a different shade of paint if this name just doesn't suit you.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 05:25:13 +00:00
Chandler Carruth
5a9cd4d44e [PM] Split the AssumptionTracker immutable pass into two separate APIs:
a cache of assumptions for a single function, and an immutable pass that
manages those caches.

The motivation for this change is two fold. Immutable analyses are
really hacks around the current pass manager design and don't exist in
the new design. This is usually OK, but it requires that the core logic
of an immutable pass be reasonably partitioned off from the pass logic.
This change does precisely that. As a consequence it also paves the way
for the *many* utility functions that deal in the assumptions to live in
both pass manager worlds by creating an separate non-pass object with
its own independent API that they all rely on. Now, the only bits of the
system that deal with the actual pass mechanics are those that actually
need to deal with the pass mechanics.

Once this separation is made, several simplifications become pretty
obvious in the assumption cache itself. Rather than using a set and
callback value handles, it can just be a vector of weak value handles.
The callers can easily skip the handles that are null, and eventually we
can wrap all of this up behind a filter iterator.

For now, this adds boiler plate to the various passes, but this kind of
boiler plate will end up making it possible to port these passes to the
new pass manager, and so it will end up factored away pretty reasonably.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225131 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-04 12:03:27 +00:00
David Majnemer
998ae69abe InstCombe: Infer nsw for multiplies
We already utilize this logic for reducing overflow intrinsics, it makes
sense to reuse it for normal multiplies as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 09:10:14 +00:00
Simon Pilgrim
94590ca4cf [InstCombine] Minor optimization for bswap with binary ops
Added instcombine optimizations for BSWAP with AND/OR/XOR ops:

OP( BSWAP(x), BSWAP(y) ) -> BSWAP( OP(x, y) )
OP( BSWAP(x), CONSTANT ) -> BSWAP( OP(x, BSWAP(CONSTANT) ) )

Since its just a one liner, I've also added BSWAP to the DAGCombiner equivalent as well:

fold (OP (bswap x), (bswap y)) -> (bswap (OP x, y))

Refactored bswap-fold tests to use FileCheck instead of just checking that the bswaps had gone.

Differential Revision: http://reviews.llvm.org/D6407



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-04 09:44:01 +00:00
Erik Eckstein
10e28ca6b1 InstCombine: simplify signed range checks
Try to convert two compares of a signed range check into a single unsigned compare.
Examples:
(icmp sge x, 0) & (icmp slt x, n) --> icmp ult x, n
(icmp slt x, 0) | (icmp sgt x, n) --> icmp ugt x, n




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223224 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-03 10:39:15 +00:00
David Majnemer
a1129621dd InstCombine: FoldOrOfICmps harder
We may be in a situation where the icmps might not be near each other in
a tree of or instructions.  Try to dig out related compare instructions
and see if they combine.

N.B.  This won't fire on deep trees of compares because rewritting the
tree might end up creating a net increase of IR.  We may have to resort
to something more sophisticated if this is a real problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222928 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-28 19:58:29 +00:00