8 Commits

Author SHA1 Message Date
Philip Reames
20c42ab3c6 [InstCombine] Extend saturating idempotent atomicrmw transform to FP
I'm assuming that the nan propogation logic for InstructonSimplify's handling of fadd and fsub is correct, and applying the same to atomicrmw.

Differential Revision: https://reviews.llvm.org/D58836



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355222 91177308-0d34-0410-b5e6-96231b3b80d8
2019-03-01 19:50:36 +00:00
Philip Reames
e7dd324daf [InstCombine] Extend "idempotent" atomicrmw optimizations to floating point
An idempotent atomicrmw is one that does not change memory in the process of execution.  We have already added handling for the various integer operations; this patch extends the same handling to floating point operations which were recently added to IR.

Note: At the moment, we canonicalize idempotent fsub to fadd when ordering requirements prevent us from using a load.  As discussed in the review, I will be replacing this with canonicalizing both floating point ops to integer ops in the near future.

Differential Revision: https://reviews.llvm.org/D58251



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355210 91177308-0d34-0410-b5e6-96231b3b80d8
2019-03-01 18:00:07 +00:00
Philip Reames
ba66e8fd76 [InstCombine] Address a couple stylistic issues pointed out by reviewer [NFC]
Better addressing comments from https://reviews.llvm.org/D58290.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354171 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-15 21:31:39 +00:00
Philip Reames
5c802fd2ca [InstCombine] Convert atomicrmws to xchg or store where legal
Implement two more transforms of atomicrmw:
1) We can convert an atomicrmw which produces a known value in memory into an xchg instead.
2) We can convert an atomicrmw xchg w/o users into a store for some orderings.

Differential Revision: https://reviews.llvm.org/D58290



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354170 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-15 21:23:51 +00:00
Philip Reames
2ecdf36fb1 [InstCombine] Add todos for possible atomicrmw transforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354059 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-14 20:48:36 +00:00
Philip Reames
fae0ff6ec8 Canonicalize all integer "idempotent" atomicrmw ops
For "idempotent" atomicrmw instructions which we can't simply turn into load, canonicalize the operation and constant. This reduces the matching needed elsewhere in the optimizer, but doesn't directly impact codegen.

For any architecture where OR/Zero is not a good default choice, you can extend the AtomicExpand lowerIdempotentRMWIntoFencedLoad mechanism. I reviewed X86 to make sure this works well, haven't audited other backends.

Differential Revision: https://reviews.llvm.org/D58244



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354058 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-14 20:41:17 +00:00
Philip Reames
d7d8ee8a86 Teach instcombine about remaining "idempotent" atomicrmw types
Expand on Quentin's r353471 patch which converts some atomicrmws into loads. Handle remaining operation types, and fix a slight bug. Atomic loads are required to have alignment. Since this was within the InstCombine fixed point, somewhere else in InstCombine was adding alignment before the verifier saw it, but still, we should fix.

Terminology wise, I'm using the "idempotent" naming that is used for the same operations in AtomicExpand and X86ISelLoweringInfo. Once this lands, I'll add similar tests for AtomicExpand, and move the pattern match function to a common location. In the review, there was seemingly consensus that "idempotent" was slightly incorrect for this context.  Once we setle on a better name, I'll update all uses at once.

Differential Revision: https://reviews.llvm.org/D58242



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354046 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-14 18:39:14 +00:00
Quentin Colombet
bf48dea586 [InstCombine] Optimize atomicrmw <op>, 0 into load atomic when possible
This commit teaches InstCombine how to replace an atomicrmw operation
into a simple load atomic.
For a given `atomicrmw <op>`, this is possible when:
1. The ordering of that operation is compatible with a load (i.e.,
   anything that doesn't have a release semantic).
2. <op> does not modify the value being stored

Differential Revision: https://reviews.llvm.org/D57854

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353471 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-07 21:27:23 +00:00