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Commit Graph

Author	SHA1	Message	Date
Sam Parker	01f20a4ee2	[ARM] Run ARMParallelDSP in the IRPasses phase Run EarlyCSE before ParallelDSP and do this in the backend IR opt phase. Differential Revision: https://reviews.llvm.org/D59257 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356130 91177308-0d34-0410-b5e6-96231b3b80d8	2019-03-14 10:57:40 +00:00
Sam Parker	77aaa84281	[NFC][ARM] Simplify loop-indexing codegen test Remove unnecessary offset checks, CHECK-BASE checks and add some extra -NOT checks and TODO comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353689 91177308-0d34-0410-b5e6-96231b3b80d8	2019-02-11 10:52:49 +00:00
Sam Parker	d0c143de76	[LSR] Generate cross iteration indexes Modify GenerateConstantOffsetsImpl to create offsets that can be used by indexed addressing modes. If formulae can be generated which result in the constant offset being the same size as the recurrence, we can generate a pre-indexed access. This allows the pointer to be updated via the single pre-indexed access so that (hopefully) no add/subs are required to update it for the next iteration. For small cores, this can significantly improve performance DSP-like loops. Differential Revision: https://reviews.llvm.org/D55373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353403 91177308-0d34-0410-b5e6-96231b3b80d8	2019-02-07 13:32:54 +00:00

Author

SHA1

Message

Date

Sam Parker

01f20a4ee2

[ARM] Run ARMParallelDSP in the IRPasses phase

Run EarlyCSE before ParallelDSP and do this in the backend IR opt
phase.

Differential Revision: https://reviews.llvm.org/D59257


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356130 91177308-0d34-0410-b5e6-96231b3b80d8

2019-03-14 10:57:40 +00:00

Sam Parker

77aaa84281

[NFC][ARM] Simplify loop-indexing codegen test

Remove unnecessary offset checks, CHECK-BASE checks and add some
extra -NOT checks and TODO comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353689 91177308-0d34-0410-b5e6-96231b3b80d8

2019-02-11 10:52:49 +00:00

Sam Parker

d0c143de76

[LSR] Generate cross iteration indexes

Modify GenerateConstantOffsetsImpl to create offsets that can be used
by indexed addressing modes. If formulae can be generated which
result in the constant offset being the same size as the recurrence,
we can generate a pre-indexed access. This allows the pointer to be
updated via the single pre-indexed access so that (hopefully) no
add/subs are required to update it for the next iteration. For small
cores, this can significantly improve performance DSP-like loops.

Differential Revision: https://reviews.llvm.org/D55373



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353403 91177308-0d34-0410-b5e6-96231b3b80d8

2019-02-07 13:32:54 +00:00

3 Commits