3 Commits

Author	SHA1	Message	Date
Stanislav Mekhanoshin	60873e298c	[AMDGPU] Prevent post-RA scheduler from breaking memory clauses ... The pre-RA scheduler does load/store clustering, but post-RA scheduler undoes it. Add mutation to prevent it. Differential Revision: https://reviews.llvm.org/D38014 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313670 91177308-0d34-0410-b5e6-96231b3b80d8	2017-09-19 20:54:38 +00:00
Matt Arsenault	2e48864110	AMDGPU: Cleanup subtarget features ... Try to avoid mutually exclusive features. Don't use a real default GPU, and use a fake "generic". The goal is to make it easier to see which set of features are incompatible between feature strings. Most of the test changes are due to random scheduling changes from not having a default fullspeed model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310258 91177308-0d34-0410-b5e6-96231b3b80d8	2017-08-07 14:58:04 +00:00
Yaxun Liu	1baa360f32	CodeGen: Let frame index value type match alloca addr space ... Recently alloca address space has been added to data layout. Due to this change, pointer returned by alloca may have different size as pointer in address space 0. However, currently the value type of frame index is assumed to be of the same size as pointer in address space 0. This patch fixes that. Most targets assume alloca returning pointer in address space 0, which is the default alloca address space. Therefore it is NFC for them. AMDGCN target with amdgiz environment requires this change since it assumes alloca returning pointer to addr space 5 and its size is 32, which is different from the size of pointer in addr space 0 which is 64. Differential Revision: https://reviews.llvm.org/D32021 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300864 91177308-0d34-0410-b5e6-96231b3b80d8	2017-04-20 18:15:34 +00:00