24 Commits

Author SHA1 Message Date
Francis Visoiu Mistrih
ca0df55065 [CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.

The MIR printer prints the IR name of a MBB only for block definitions.

* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix

Differential Revision: https://reviews.llvm.org/D40422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-04 17:18:51 +00:00
Stanislav Mekhanoshin
2df3fafbea [AMDGPU] Eliminate no effect instructions before s_endpgm
Differential Revision: https://reviews.llvm.org/D36585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310987 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-16 04:43:49 +00:00
Stanislav Mekhanoshin
6069fa8531 [AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL
In case if SI_KILL is in between of the SI_IF and SI_END_CF we need
to preserve the bits actually flipped by if rather then restoring
the original mask.

Differential Revision: https://reviews.llvm.org/D36299

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 06:58:42 +00:00
Stanislav Mekhanoshin
ddb10d2e51 [AMDGPU] Optimize SI_IF lowering for simple if regions
Currently SI_IF results in a s_and_saveexec_b64 followed by s_xor_b64.
The xor is used to extract only the changed bits. In case of a simple
if region where the only use of that value is in the SI_END_CF to
restore the old exec mask, we can omit the xor and perform an or of
the exec mask with the original exec value saved by the
s_and_saveexec_b64.

Differential Revision: https://reviews.llvm.org/D35861

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-26 21:29:15 +00:00
Matt Arsenault
271bf6ebf9 AMDGPU: Use correct register names in inline assembly
Fixes using physical registers in inline asm from clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 19:03:20 +00:00
Matt Arsenault
b216ff22ea AMDGPU: Convert image intrinsic uses in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298386 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 16:24:12 +00:00
Kyle Butt
0aa7497cd7 Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
This reverts commit ada6595a526d71df04988eb0a4b4fe84df398ded.

This needs a simple probability check because there are some cases where it is
not profitable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291695 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-11 19:55:19 +00:00
Kyle Butt
ada6595a52 CodeGen: Allow small copyable blocks to "break" the CFG.
When choosing the best successor for a block, ordinarily we would have preferred
a block that preserves the CFG unless there is a strong probability the other
direction. For small blocks that can be duplicated we now skip that requirement
as well.

Differential revision: https://reviews.llvm.org/D27742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291609 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-10 23:04:30 +00:00
Matt Arsenault
0b698fea77 AMDGPU: Select branch on undef to uniform scc branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289877 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-15 21:57:11 +00:00
Matt Arsenault
a079dfc363 AMDGPU: Don't required structured CFG
The structured CFG is just an aid to inserting exec
mask modification instructions, once that is done
we don't really need it anymore. We also
do not analyze blocks with terminators that
modify exec, so this should only be impacting
true branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288744 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-06 01:02:51 +00:00
Matt Arsenault
3acbc32a69 AMDGPU: Change how exp is printed
This is an improvement over a long list of unreadable numbers.
A follow up patch will try to match how sc formats these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288697 91177308-0d34-0410-b5e6-96231b3b80d8
2016-12-05 20:31:49 +00:00
Matthias Braun
ee5205bfae ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()
addSchedBarrierDeps() is supposed to add use operands to the ExitSU
node. The current implementation adds uses for calls/barrier instruction
and the MBB live-outs in all other cases. The use
operands of conditional jump instructions were missed.

Also added code to macrofusion to set the latencies between nodes to
zero to avoid problems with the fusing nodes lingering around in the
pending list now.

Differential Revision: https://reviews.llvm.org/D25140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286544 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 01:34:21 +00:00
Matt Arsenault
f577de357a AMDGPU: Remove unnecessary and on conditional branch
The comment explaining why this was necessary is incorrect
in its description of v_cmp's behavior for inactive workitems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286134 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-07 19:09:33 +00:00
Matt Arsenault
ecc6c2b633 BranchRelaxation: Support expanding unconditional branches
AMDGPU needs to expand unconditional branches in a new
block with an indirect branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283464 91177308-0d34-0410-b5e6-96231b3b80d8
2016-10-06 16:20:41 +00:00
Matt Arsenault
7eba65d30c AMDGPU: Use unsigned compare for eq/ne
For some reason there are both of these available, except
for scalar 64-bit compares which only has u64. I'm not sure
why there are both (I'm guessing it's for the one bit inputs we
don't use), but for consistency always using the
unsigned one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282832 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-30 01:50:20 +00:00
Matt Arsenault
d764af3c4e AMDGPU: Support commuting with immediate in src0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280970 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-08 17:19:29 +00:00
Matt Arsenault
34c6b123f7 AMDGPU: Change insertion point of si_mask_branch
Insert before the skip branch if one is created.
This is a somewhat more natural placement relative
to the skip branches, and makes it possible to implement
analyzeBranch for skip blocks.

The test changes are mostly due to a quirk where
the block label is not emitted if there is a terminator
that is not also a branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278273 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-10 19:11:42 +00:00
Nicolai Haehnle
87d298325f AMDGPU: Stay in WQM for non-intrinsic stores
Summary:
Two types of stores are possible in pixel shaders: stores to memory that are
explicitly requested at the API level, and stores that are an implementation
detail of register spilling or lowering of arrays.

For the first kind of store, we must ensure that helper pixels have no effect
and hence WQM must be disabled. The second kind of store must always be
executed, because the written value may be loaded again in a way that is
relevant for helper pixels as well -- and there are no externally visible
effects anyway.

This is a candidate for the 3.9 release branch.

Reviewers: arsenm, tstellarAMD, mareko

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: https://reviews.llvm.org/D22675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277504 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-02 19:31:14 +00:00
Matt Arsenault
beff7fe056 AMDGPU: Fix not expanding control flow after some kill blocks
Also stop trying to insert skip blocks at end_cf. This
was inserting them at the end of the block which doesn't make
sense. The skip should be inserted at the beginning of the block
right after the end cf. Just remove this for now since no tests
seem to stress this and I think this can be handled more generally
later.

Fixes bug 28550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275510 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 00:58:15 +00:00
Matt Arsenault
011dcf3d90 AMDGPU: Fix trying to skip from a block with no successors
Found while reducing bug 28550

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275509 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 00:58:13 +00:00
Matt Arsenault
435a4467a3 AMDGPU: Fix splitting kill blocks with defs before kill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275508 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 00:58:09 +00:00
Matt Arsenault
e6aa9db488 AMDGPU: Fold out no-op kill intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275253 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-13 06:04:22 +00:00
Matt Arsenault
8a85be7236 AMDGPU: Follow up to r275203
I meant to squash this into it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275220 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 21:41:32 +00:00
Matt Arsenault
3f7a1b2f11 AMDGPU: Fix verifier error with kill intrinsic
Don't create a terminator in the middle of the block.
We should probably get rid of this intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275203 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 19:01:23 +00:00