Commit Graph

19 Commits

Author SHA1 Message Date
Matt Arsenault 8a9af26e28 AMDGPU/R600: Delete dead code.
Dead or the same as the base implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275616 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 21:26:46 +00:00
Jacques Pienaar 48ed4ab2d6 Rename AnalyzeBranch* to analyzeBranch*.
Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect.

Reviewers: tstellarAMD, mcrosier

Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai

Differential Revision: https://reviews.llvm.org/D22409

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275564 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-15 14:41:04 +00:00
Matt Arsenault 8711de225b AMDGPU: Move R600 only pieces into R600 classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274979 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-09 18:11:15 +00:00
Duncan P. N. Exon Smith 83b2ab7c4c AMDGPU: Remove implicit iterator conversions, NFC
Remove remaining implicit conversions from MachineInstrBundleIterator to
MachineInstr* from the AMDGPU backend.  In most cases, I made them less
attractive by preferring MachineInstr& or using a ranged-based for loop.

Once all the backends are fixed I'll make the operator explicit so that
this doesn't bitrot back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274906 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-08 19:16:05 +00:00
Duncan P. N. Exon Smith 567409db69 CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr.  This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other.  Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators.  The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency.  Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy.  I couldn't run tests
for AVR since llc doesn't link with it turned on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274189 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-30 00:01:54 +00:00
Matt Arsenault 759ed7e410 AMDGPU: Cleanup subtarget handling.
Split AMDGPUSubtarget into amdgcn/r600 specific subclasses.
This removes most of the static_casting of the basic codegen
classes everywhere, and tries to restrict the features
visible on the wrong target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273652 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-24 06:30:11 +00:00
Benjamin Kramer af18e017d2 Pass DebugLoc and SDLoc by const ref.
This used to be free, copying and moving DebugLocs became expensive
after the metadata rewrite. Passing by reference eliminates a ton of
track/untrack operations. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272512 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-12 15:39:02 +00:00
Jan Vesely 06fcf3416b AMDGPU/R600: There are other uses for ALU_LITERAL besides Imm
This will be used for GV

Reviewers: tstellard

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D19788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269475 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-13 20:39:20 +00:00
Jan Vesely 4d64cfeeea AMDGPU/R600: Minor cleanup in InstrInfo
Use std::make_pair instead of constructor
Use C++11 loop
Reuse helper var

Reviewers: tstellardAMD

Subsribers: arsenm

Differential Revision: http://reviews.llvm.org/D19787

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268503 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-04 14:55:45 +00:00
Nicolai Haehnle ea7a0c0467 AMDGPU: Add a shader calling convention
This makes it possible to distinguish between mesa shaders
and other kernels even in the presence of compute shaders.

Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

Differential Revision: http://reviews.llvm.org/D18559

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265589 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-06 19:40:20 +00:00
Matt Arsenault e407a109c1 AMDGPU: Simplify boolean conditional return statements
Patch by Richard Thomson

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262536 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-02 23:00:21 +00:00
Duncan P. N. Exon Smith 5b9b80ea30 CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest).  All of these
functions require non-null parameters already, so references are more
clear.  As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261605 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 02:46:52 +00:00
Tom Stellard d794d16bc1 AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfo
Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16862

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259900 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-05 18:44:57 +00:00
Tom Stellard 814bd29cfe AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cpp
Summary:
Also delete all the stub functions that are identical to the
implementations in TargetInstrInfo.cpp.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D16609

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259054 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-28 16:04:37 +00:00
Cong Hou e5457136e7 Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-09-10 23:10:42 +00:00
Benjamin Kramer 2f6d58ae0d Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240639 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 13:28:24 +00:00
Tom Stellard 953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00
Tom Stellard b1162b8d4b Revert "AMDGPU: Add core backend files for R600/SI codegen v6"
This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-16 18:19:53 +00:00
Tom Stellard 23dc769a9b AMDGPU: Add core backend files for R600/SI codegen v6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-16 14:17:08 +00:00