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4 Commits

Author SHA1 Message Date
Matt Arsenault a15bb16493 AMDGPU: Make frame register caller preserved 
Using SplitCSR for the frame register was very broken. Often
the copies in the prolog and epilog were optimized out, in addition
to them being inserted after the true prolog where the FP
was clobbered.

I have a hacky solution which works that continues to use
split CSR, but for now this is simpler and will get to working
programs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313274 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-09-14 17:14:57 +00:00
Matt Arsenault a1a416812a AMDGPU: Don't spill SP reg like a normal CSR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313217 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-09-13 23:47:01 +00:00
Matt Arsenault 4e0c4fb9c1 AMDGPU: Fix not accounting for tail call resource usage 
If the only call in a function is a tail call, the
function isn't considered to have a call since it's a
type of return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312561 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-09-05 18:36:36 +00:00
Matt Arsenault 45424dbebb AMDGPU: Start adding tail call support 
Handle the sibling call cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310753 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-08-11 20:42:08 +00:00