2 Commits

Author	SHA1	Message	Date
Tony Jiang	ee1d801b4f	[Power9] Exploit vector integer extend instructions when indices aren't correct. ... This patch adds on to the exploitation added by https://reviews.llvm.org/D33510. This now catches build vector nodes where the inputs are coming from sign extended vector extract elements where the indices used by the vector extract are not correct. We can still use the new hardware instructions by adding a shuffle to move the elements to the correct indices. I introduced a new PPCISD node here because adding a vector_shuffle and changing the elements of the vector_extracts was getting undone by another DAG combine. Commit on behalf of Zaara Syeda (syzaara@ca.ibm.com) Differential Revision: https://reviews.llvm.org/D34009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307169 91177308-0d34-0410-b5e6-96231b3b80d8	2017-07-05 16:00:38 +00:00
Zaara Syeda	32a3852f3c	[Power9] Exploit vector integer extend instructions ... This patch adds build vector patterns to exploit the vector integer extend instructions: vextsb2w - Vector Extend Sign Byte To Word vextsb2d - Vector Extend Sign Byte To Doubleword vextsh2w - Vector Extend Sign Halfword To Word vextsh2d - Vector Extend Sign Halfword To Doubleword vextsw2d - Vector Extend Sign Word To Doubleword Differential Revision: https://reviews.llvm.org/D33510 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304992 91177308-0d34-0410-b5e6-96231b3b80d8	2017-06-08 17:14:36 +00:00