3427 Commits

Author SHA1 Message Date
Craig Topper 7e1904e9c8 Recommit r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
The hexagon test should be fixed now.

Original commit message:

This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317600 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-07 18:47:24 +00:00
Adrian Prantl 790be31f8c InstCombine: salvage the debug info of DCE'ed add instructions.
rdar://problem/31209283

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317522 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 22:49:39 +00:00
Hans Wennborg e209a1a12d Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.

> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317518 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 22:28:02 +00:00
Craig Topper aceaaf0aec [InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.

This can allow us to get the select closer to other selects to enable removing one.

Differential Revision: https://reviews.llvm.org/D39222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-06 21:07:22 +00:00
Matthew Simpson 4f7d658ee0 [InstCombine] Simplify selects that test cmpxchg instructions
If a select instruction tests the returned flag of a cmpxchg instruction and
selects between the returned value of the cmpxchg instruction and its compare
operand, the result of the select will always be equal to its false value.

Differential Revision: https://reviews.llvm.org/D39383

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-31 12:34:02 +00:00
Haicheng Wu 2956373588 [ConstantFold] Fix a crash when folding a GEP that has vector index
LLVM crashes when factoring out an out-of-bound index into preceding dimension
and the preceding dimension uses vector index.  Simply bail out now when this
case happens.

Differential Revision: https://reviews.llvm.org/D38677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316824 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-28 02:27:14 +00:00
Artur Gainullin 359c2dcf35 Improve clamp recognition in ValueTracking.
Summary:
ValueTracking was recognizing not all variations of clamp. Swapping of
true value and false value of select was added to fix this problem. The
first patch was reverted because it caused miscompile in NVPTX target. 
Added corresponding test cases.

Reviewers: spatel, majnemer, efriedma, reames

Subscribers: llvm-commits, jholewinski

Differential Revision: https://reviews.llvm.org/D39240



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316795 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-27 20:53:41 +00:00
Marek Olsak 4fda278e9b AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)
Summary:
Kill the thread if operand 0 == false.
llvm.amdgcn.wqm.vote can be applied to the operand.

Also allow kill in all shader stages.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D38544

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316427 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 10:27:13 +00:00
Marek Olsak 7525c08782 AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D38543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316426 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-24 10:26:59 +00:00
Artur Gainullin 9d639dd5bd Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316322 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-23 13:25:49 +00:00
Yichao Yu 689fbe0109 Fix invalid ptrtoint in InstCombine
Summary:
It's unclear if this is the only thing we can do but at least this is consistent with the check
of address space agreement in `isBitCastable`.

The code is used at least in both instcombine and jumpthreading though
I could only find a way to trigger the invalid cast in instcombine.

Reviewers: loladiro, sanjoy, majnemer

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34335

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316302 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-22 20:28:17 +00:00
Nikolai Bozhenov 2942c7833b Revert r315992 because of a found miscompilation failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316164 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 15:36:18 +00:00
Nikolai Bozhenov 42759c20ed Improve lookThroughCast function.
Summary:
When we have the following case:

  %cond = cmp iN %x, CmpConst
  %tr = trunc iN %x to iK
  %narrowsel = select i1 %cond, iK %t, iK C

We could possibly match only min/max pattern after looking through cast.
So it is more profitable if widened C constant will be equal CmpConst.
That is why just set widened C constant equal to CmpConst, because there
is a further check in this function that trunc CmpConst == C.

Also description for lookTroughCast function was added.

Reviewers: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38536

Patch by: Artur Gainullin <artur.gainullin@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316070 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18 09:28:09 +00:00
Nikolai Bozhenov 12367d9435 Improve clamp recognition in ValueTracking.
Summary:
ValueTracking was recognizing not all variations of clamp. Swapping of
true value and false value of select was added to fix this problem. This
change breaks the canonical form of cmp inside the matchMinMax function,
that is why additional checks for compare predicates is needed. Added
corresponding test cases.

Reviewers: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38531

Patch by: Artur Gainullin <artur.gainullin@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-17 11:50:48 +00:00
Nikolai Bozhenov efa58149ae Move folding of icmp with zero after checking for min/max idioms.
Summary:
The following transformation for cmp instruction:

  icmp smin(x, PositiveValue), 0 -> icmp x, 0

should only be done after checking for min/max to prevent infinite
looping caused by a reverse canonicalization. That is why this
transformation was moved to place after the mentioned check.

Reviewers: spatel, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38934

Patch by: Artur Gainullin <artur.gainullin@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315895 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-16 09:19:21 +00:00
Sanjay Patel 53bdccfd61 revert r314984: revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
Recommitting r314698. The bug exposed by this change should be fixed with:
https://reviews.llvm.org/rL315579 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315857 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-15 15:39:15 +00:00
Sanjay Patel ab26bdd6c2 [InstCombine] move code to remove repeated constant check; NFCI
Also, consolidate tests for this fold in one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315745 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 20:29:11 +00:00
Sanjay Patel a7bbf63f80 [InstCombine] add hasOneUse check to add-zext-add fold to prevent increasing instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315718 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 17:47:25 +00:00
Sanjay Patel 5860eabc2f [InstCombine] add tests for add (zext (add nuw X, C2)), C --> zext (add nuw X, C2 + C); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315717 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 17:42:12 +00:00
Sanjay Patel b22d64b7ed [InstCombine] allow zext(bool) + C --> select bool, C+1, C for vector types
The backend should be prepared for this transform after:
https://reviews.llvm.org/rL311731



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315701 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 16:29:38 +00:00
Sanjay Patel 138989f016 [InstCombine] add tests for boolean extend + add; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315681 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-13 14:09:45 +00:00
Sanjay Patel 143ffebf67 [InstCombine] add baseline tests for D38531; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315461 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-11 14:29:17 +00:00
Xinliang David Li 60c5ae542c Renable r314928
Eliminate inttype phi with inttoptr/ptrtoint.

 This version fixed a bug in finding the matching
 phi -- the order of the incoming blocks may be 
 different (triggered in self build on Windows).
 A new test case is added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 05:07:54 +00:00
Sanjay Patel 1b2747a59f [InstCombine] use correct type when propagating constant condition in simplifyDivRemOfSelectWithZeroOp (PR34856)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315130 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 23:43:06 +00:00
Reid Kleckner 57c865bc5d Revert "Roll forward r314928"
This appears to be miscompiling Clang, as shown on two Windows bootstrap
bots:
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7611
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/6870

Nothing else is in the blame list. Both emit errors on this valid code
in the Windows ucrt headers:

C:\...\ucrt\malloc.h:95:32: error: invalid operands to binary expression ('char *' and 'int')
            _Ptr = (char*)_Ptr + _ALLOCA_S_MARKER_SIZE;
                   ~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~

I am attempting to reproduce this now.

This reverts r315044

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315108 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 21:17:51 +00:00
Xinliang David Li 80d30e12cc Roll forward r314928
Fixed ThinLTO bootstrap failure : track new
bitcast per incomingVal. Added new tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315044 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-06 05:15:25 +00:00
Sanjay Patel b1eb7bb6ec [InstCombine] improve folds for icmp gt/lt (shr X, C1), C2
We can always eliminate the shift in: icmp gt/lt (shr X, C1), C2 --> icmp gt/lt X, C'
This patch was supposed to just be an efficiency improvement because we were doing this 3-step process to fold:

IC: Visiting:   %c = icmp ugt i4 %s, 1
IC: ADD:   %s = lshr i4 %x, 1
IC: ADD:   %1 = udiv i4 %x, 2
IC: Old =   %c = icmp ugt i4 %1, 1
    New =   <badref> = icmp uge i4 %x, 4
IC: ADD:   %c = icmp uge i4 %x, 4
IC: ERASE   %2 = icmp ugt i4 %1, 1
IC: Visiting:   %c = icmp uge i4 %x, 4
IC: Old =   %c = icmp uge i4 %x, 4
    New =   <badref> = icmp ugt i4 %x, 3
IC: ADD:   %c = icmp ugt i4 %x, 3
IC: ERASE   %2 = icmp uge i4 %x, 4
IC: Visiting:   %c = icmp ugt i4 %x, 3
IC: DCE:   %1 = udiv i4 %x, 2
IC: ERASE   %1 = udiv i4 %x, 2
IC: DCE:   %s = lshr i4 %x, 1
IC: ERASE   %s = lshr i4 %x, 1
IC: Visiting:   ret i1 %c

When we could go directly to canonical icmp form:

IC: Visiting:   %c = icmp ugt i4 %s, 1
IC: Old =   %c = icmp ugt i4 %s, 1
    New =   <badref> = icmp ugt i4 %x, 3
IC: ADD:   %c = icmp ugt i4 %x, 3
IC: ERASE   %1 = icmp ugt i4 %s, 1
IC: ADD:   %s = lshr i4 %x, 1
IC: DCE:   %s = lshr i4 %x, 1
IC: ERASE   %s = lshr i4 %x, 1
IC: Visiting:   %c = icmp ugt i4 %x, 3

...but then I noticed that the folds were incomplete too:
https://godbolt.org/g/aB2hLE

Here are attempts to prove the logic with Alive:
https://rise4fun.com/Alive/92o

Name: lshr_ult
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr i8 %x, C1
%r = icmp ult i8 %sh, C2
  =>
%r = icmp ult i8 %x, (C2 << C1)

Name: ashr_slt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr i8 %x, C1
%r = icmp slt i8 %sh, C2
  =>
%r = icmp slt i8 %x, (C2 << C1)

Name: lshr_ugt
Pre: (((C2+1) << C1) u>> C1) == (C2+1)
%sh = lshr i8 %x, C1
%r = icmp ugt i8 %sh, C2
  =>
%r = icmp ugt i8 %x, ((C2+1) << C1) - 1

Name: ashr_sgt
Pre: (C2 != 127) && ((C2+1) << C1 != -128) && (((C2+1) << C1) >> C1) == (C2+1)
%sh = ashr i8 %x, C1
%r = icmp sgt i8 %sh, C2
  =>
%r = icmp sgt i8 %x, ((C2+1) << C1) - 1

Name: ashr_exact_sgt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr exact i8 %x, C1
%r = icmp sgt i8 %sh, C2
  =>
%r = icmp sgt i8 %x, (C2 << C1)

Name: ashr_exact_slt
Pre: ((C2 << C1) >> C1) == C2
%sh = ashr exact i8 %x, C1
%r = icmp slt i8 %sh, C2
  =>
%r = icmp slt i8 %x, (C2 << C1)

Name: lshr_exact_ugt
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr exact i8 %x, C1
%r = icmp ugt i8 %sh, C2
  =>
%r = icmp ugt i8 %x, (C2 << C1)

Name: lshr_exact_ult
Pre: ((C2 << C1) u>> C1) == C2
%sh = lshr exact i8 %x, C1
%r = icmp ult i8 %sh, C2
  =>
%r = icmp ult i8 %x, (C2 << C1)

We did something similar for 'shl' in D28406.

Differential Revision: https://reviews.llvm.org/D38514




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315021 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 21:11:49 +00:00
Sanjay Patel 895743db76 revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
There is a bot failure that appears to be related to this change:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/2117

...so reverting to confirm that and attempting to keep the bot green while investigating.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314984 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 14:26:15 +00:00
Craig Topper 8114ee377b [InstCombine] Fix a vector splat handling bug in transformZExtICmp.
We were using an i1 type and then zero extending to a vector. Instead just create the 0/1 directly as a ConstantInt with the correct type. No need to ask ConstantExpr to zero extend for us.

This bug is a bit tricky to hit because it requires us to visit a zext of an icmp that would normally be simplified to true/false, but that icmp hasnt' been visited yet. In the test case this zext and icmp were created by visiting a udiv and due to worklist ordering we got to the zext first.

Fixes PR34841.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314971 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 07:59:11 +00:00
Xinliang David Li cd539c40a9 Revert r314928 to investigate thinLTO bootstrap failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314961 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-05 01:40:13 +00:00
Craig Topper e86553295b [InstCombine] Improve support for ashr in foldICmpAndShift
We can support ashr similar to lshr, if we know that none of the shifted in bits are used. In that case SimplifyDemandedBits would normally convert it to lshr. But that conversion doesn't happen if the shift has additional users.

Differential Revision: https://reviews.llvm.org/D38521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314945 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 23:06:13 +00:00
Xinliang David Li 2ba1670f7b Recommit r314561 after fixing msan build failure
(trial 2) Incoming val defined by terminator instruction which
also requires bitcasts can not be handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314928 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 20:17:55 +00:00
Sanjay Patel 593ed575ce [InstCombine] add 'exact' variants of all tests; NFC
We can likely remove most of these as redundant in the near future, 
but I'm trying to make sure I don't introduce any regressions with D38514.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314907 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-04 15:17:25 +00:00
Sanjay Patel 4706e74f4b [InstCombine] add tests for icmp gt/lt (shr X, C1), C2; NFC
Surprisingly, we have zero coverage for these patterns.

Many of these are handled in InstSimplify, but it's not obvious
what the rule for folding each case should be, so I've just
stamped out everything.

It should be possible to fold every case, but currently, we
miss these:

int ashr_slt(int x) {
  return (x >> 1) < 1; 
}

int ashr_sgt(int x) {
  return (x >> 1) > 0; 
}

https://godbolt.org/g/aB2hLE



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314837 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 20:34:20 +00:00
Sanjay Patel affb6c229e [InstCombine] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314712 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 20:16:59 +00:00
Sanjay Patel 83a8b8b87c [InstCombine] add icmp (shr X, Y), 0 test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314710 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 20:07:15 +00:00
Sanjay Patel fc20547ae6 [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314698 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 18:26:44 +00:00
Sanjay Patel 03048ddd78 [InstCombine] add icmp (lshr X, C1), C2 test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314696 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-02 18:16:17 +00:00
Daniel Jasper ba1d57e4a9 Revert r314579: "Recommi r314561 after fixing over-debug assertion".
And follow-up r314585.
Leads to segfaults. I'll forward reproduction instructions to the patch
author.

Also, for a recommit, still add the original patch description.
Otherwise, it becomes really tedious to find out what a patch actually
does. The fact that it is a recommit with a fix is somewhat secondary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314622 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-01 09:53:53 +00:00
Xinliang David Li 082ee26782 Recommi r314561 after fixing over-debug assertion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314579 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-30 00:46:32 +00:00
Xinliang David Li c10eefd292 Revert 314561 due to debug build assertion failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314563 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-29 22:30:34 +00:00
Xinliang David Li 9e5998cdf7 Eliminate PHI (int typed) which has only one use by intptr
This patch will eliminate redundant intptr/ptrtoint that pessimizes
analyses such as SCEV, AA and will make optimization passes such
as auto-vectorization more powerful.

Differential revision: http://reviews.llvm.org/D37832


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314561 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-29 22:10:15 +00:00
Chad Rosier 580c45b12d [InstCombine] Gating select arithmetic optimization.
These changes faciliate positive behavior for arithmetic based select
expressions that match its translation criteria, keeping code size gated to
neutral or improved scenarios.

Patch by Michael Berg <michael_c_berg@apple.com>!

Differential Revision: https://reviews.llvm.org/D38263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-27 17:16:51 +00:00
Craig Topper 4ab489f31f [InstCombine] Remove one use restriction on the shift for calls to foldICmpAndShift.
If this transformation succeeds, we're going to remove our dependency on the shift by rewriting the and. So it doesn't matter how many uses the shift has.

This distributes the one use check to other transforms in foldICmpAndConstConst that do need it.

Differential Revision: https://reviews.llvm.org/D38206

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-26 18:47:25 +00:00
Matthias Braun 77cad59acf TargetLibraryInfo: Stop guessing wchar_t size
Usually the frontend communicates the size of wchar_t via metadata and
we can optimize wcslen (and possibly other calls in the future). In
cases without the wchar_size metadata we would previously try to guess
the correct size based on the target triple; however this is fragile to
keep up to date and may miss users manually changing the size via flags.
Better be safe and stop guessing and optimizing if the frontend didn't
communicate the size.

Differential Revision: https://reviews.llvm.org/D38106

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-26 02:36:57 +00:00
Sanjay Patel 00b5bff2c2 [InstCombine] remove extract-of-select vector transform (2nd try)
The 1st attempt at this:
https://reviews.llvm.org/rL314117
was reverted at:
https://reviews.llvm.org/rL314118

because of bot fails for clang tests that were checking optimized IR. That should be fixed with:
https://reviews.llvm.org/rL314144
...so try again. 

Original commit message:

The transform to convert an extract-of-a-select-of-vectors was added at:
https://reviews.llvm.org/rL194013

And a question about the validity of this transform was raised in the review:
https://reviews.llvm.org/D1539:
...but not answered AFAICT>

Most of the motivating cases in that patch are now handled by other combines. These are the tests that were added with
the original commit, but they are not regressing even after we remove the transform in this patch.

The diffs we see after removing this transform cause us to avoid increasing the instruction count, so we don't want to do
those transforms as canonicalizations.

The motivation for not turning a vector-select-of-vectors into a scalar operation is shown in PR33301:
https://bugs.llvm.org/show_bug.cgi?id=33301
...in those cases, we'll get vector ops with this patch rather than the vector/scalar mix that we currently see.

Differential Revision: https://reviews.llvm.org/D38006


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314147 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-25 20:30:53 +00:00
Sanjay Patel 26f60ee8f1 revert r314117 because there are bogus clang tests that depend on the optimizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314118 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-25 17:00:04 +00:00
Sanjay Patel 752909f8e3 [InstCombine] remove extract-of-select vector transform
The transform to convert an extract-of-a-select-of-vectors was added at:
rL194013

And a question about the validity of this transform was raised in the review:
https://reviews.llvm.org/D1539:
...but not answered AFAICT>

Most of the motivating cases in that patch are now handled by other combines. These are the tests that were added with
the original commit, but they are not regressing even after we remove the transform in this patch.

The diffs we see after removing this transform cause us to avoid increasing the instruction count, so we don't want to do
those transforms as canonicalizations.

The motivation for not turning a vector-select-of-vectors into a scalar operation is shown in PR33301:
https://bugs.llvm.org/show_bug.cgi?id=33301
...in those cases, we'll get vector ops with this patch rather than the vector/scalar mix that we currently see.

Differential Revision: https://reviews.llvm.org/D38006


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-25 16:41:34 +00:00
Craig Topper e402b549ba [InstCombine] Teach foldICmpUsingKnownBits to simplify SLE/SGE/ULE/UGE to equality comparisons when the min/max ranges intersect in a single value.
This is the inverse of what we do for SGT/SLT/UGT/ULT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-22 21:47:22 +00:00
Craig Topper d75d4fb90d [InstCombine] Add test cases for known bits simplifications for comparisons that don't depend on constant RHS. NFC
This shows some missing simplifications for sge/sle/uge/ule relative to their non-equality counterparts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314031 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-22 21:47:21 +00:00