Commit Graph

4659 Commits

Author SHA1 Message Date
Tim Shen a06a324ebf [PPCVSXFMAMutate] Temporarily disable this pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262573 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-03 01:27:35 +00:00
Kit Barton 35cace5d36 [Power9] Implement new vector compare, extract, insert instructions
This change implements the following vector operations:

  - Vector Compare Not Equal
    - vcmpneb(.) vcmpneh(.) vcmpnew(.)
    - vcmpnezb(.) vcmpnezh(.) vcmpnezw(.)
  - Vector Extract Unsigned
    - vextractub vextractuh vextractuw vextractd
    - vextublx vextubrx vextuhlx vextuhrx vextuwlx vextuwrx
  - Vector Insert
    - vinsertb vinserth vinsertw vinsertd

26 instructions.

Phabricator: http://reviews.llvm.org/D15916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262392 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 20:51:57 +00:00
Kit Barton 609592b9c2 New file to track implementation status of new POWER9 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262386 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 20:19:43 +00:00
Matthias Braun eab2869a64 TableGen: Check scheduling models for completeness
TableGen checks at compiletime that for scheduling models with
"CompleteModel = 1" one of the following holds:

- Is marked with the hasNoSchedulingInfo flag
- The instruction is a subclass of Sched
- There are InstRW definitions in the scheduling model

Typical steps necessary to complete a model:

- Ensure all pseudo instructions that are expanded before machine
  scheduling (usually everything handled with EmitYYY() functions in
  XXXTargetLowering).
- If a CPU does not support some instructions mark the corresponding
  resource unsupported: "WriteRes<WriteXXX, []> { let Unsupported = 1; }".
- Add missing scheduling information.

Differential Revision: http://reviews.llvm.org/D17747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262384 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-01 20:03:21 +00:00
Nemanja Ivanovic 9411e53a30 Fix for PR26180
Corresponds to Phabricator review:
http://reviews.llvm.org/D16592

This fix includes both an update to how we handle the "generic" CPU on LE
systems as well as Anton's fix for the Fast Isel issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262233 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-29 16:42:27 +00:00
Duncan P. N. Exon Smith 1d75c8d9ec CodeGen: Change MachineInstr to use MachineInstr&, NFC
Change MachineInstr API to prefer MachineInstr& over MachineInstr*
whenever the parameter is expected to be non-null.  Slowly inching
toward being able to fix PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262149 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 20:01:33 +00:00
Duncan P. N. Exon Smith 42e18357c5 CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
Take MachineInstr by reference instead of by pointer in SlotIndexes and
the SlotIndex wrappers in LiveIntervals.  The MachineInstrs here are
never null, so this cleans up the API a bit.  It also incidentally
removes a few implicit conversions from MachineInstrBundleIterator to
MachineInstr* (see PR26753).

At a couple of call sites it was convenient to convert to a range-based
for loop over MachineBasicBlock::instr_begin/instr_end, so I added
MachineBasicBlock::instrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262115 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-27 06:40:41 +00:00
Kit Barton 5b4af7f722 [PPC] Legalize FNEG on PPC when possible
Currently we always expand ISD::FNEG. For v4f32 and v2f64 vector types VSX has
native support for this opcode

Phabricator: http://reviews.llvm.org/D17647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262079 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:59:44 +00:00
Kit Barton 2178c71174 Power9] Implement new vsx instructions: compare and conversion
This change implements the following vsx instructions:

Quad/Double-Precision Compare:
xscmpoqp xscmpuqp
xscmpexpdp xscmpexpqp
xscmpeqdp xscmpgedp xscmpgtdp xscmpnedp
xvcmpnedp(.) xvcmpnesp(.)
Quad-Precision Floating-Point Conversion
xscvqpdp(o) xscvdpqp
xscvqpsdz xscvqpswz xscvqpudz xscvqpuwz xscvsdqp xscvudqp
xscvdphp xscvhpdp xvcvhpsp xvcvsphp
xsrqpi xsrqpix xsrqpxp
28 instructions

Phabricator: http://reviews.llvm.org/D16709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@262068 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-26 21:11:55 +00:00
Aaron Ballman 6d92f5b545 Silencing a signed vs unsigned mismatch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261640 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 15:02:43 +00:00
Duncan P. N. Exon Smith 5b9b80ea30 CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest).  All of these
functions require non-null parameters already, so references are more
clear.  As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261605 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-23 02:46:52 +00:00
Nemanja Ivanovic 94db889776 Fix for PR26690 take 2
This is what was meant to be in the initial commit to fix this bug. The
parens were missing. This commit also adds a test case for the bug and
has undergone full testing on PPC and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261546 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 18:04:00 +00:00
Nemanja Ivanovic 485b73c671 Revert bad fix for PR26690.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261527 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 15:06:32 +00:00
Nemanja Ivanovic 6bf5860c4e Fix for PR26690
I mistook BitVector::empty() to mean BitVector::count() == 0 and it does
not. Corrected the issue with the fix for PR26500.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261525 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 14:47:49 +00:00
Benjamin Kramer b0ce7c7fb5 Fix some abuse of auto flagged by clang's -Wrange-loop-analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261524 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-22 13:11:58 +00:00
Nemanja Ivanovic 530622611f Fix the build bot break caused by rL261441.
The patch has a necessary call to a function inside an assert. Which is fine
when you have asserts turned on. Not so much when they're off. Sorry about
the regression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261447 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 20:45:37 +00:00
Nemanja Ivanovic 3cf0c95d5c Fix for PR 26500
This patch corresponds to review:
http://reviews.llvm.org/D17294

It ensures that whatever block we are emitting the prologue/epilogue into, we
have the necessary scratch registers. It takes away the hard-coded register
numbers for use as scratch registers as registers that are guaranteed to be
available in the function prologue/epilogue are not guaranteed to be available
within the function body. Since we shrink-wrap, the prologue/epilogue may end
up in the function body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261441 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-20 18:16:25 +00:00
Richard Trieu 1b96cbe208 Remove uses of builtin comma operator.
Cleanup for upcoming Clang warning -Wcomma.  No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261270 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 22:09:30 +00:00
Adam Nemet b8d9c89680 [PPCLoopDataPrefetch] Move pass to Transforms/Scalar/LoopDataPrefetch. NFC
This patch is part of the work to make PPCLoopDataPrefetch
target-independent
(http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758).

Obviously the pass still only used from PPC at this point.  Subsequent
patches will start driving this from ARM64 as well.

Due to the previous patch most lines should show up as moved lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261265 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 21:38:19 +00:00
Adam Nemet 35c57f1f6b [PPCLoopDataPrefetch] Remove PPC from some of the names. NFC
This is done only to make the next patch that move the pass out PPC to
Transforms easier to read.  After this most line should show up as moved
lines in that patch.

This patch is part of the work to make PPCLoopDataPrefetch
target-independent
(http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261264 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 21:37:12 +00:00
Ahmed Bougacha 606927f7bb [CodeGen] Document and use getConstant's splat-building feature. NFC.
Differential Revision: http://reviews.llvm.org/D17229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260901 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-15 18:07:29 +00:00
Colin LeMahieu 89dcdff198 [MC] Merge VK_PPC_TPREL in to generic VK_TPREL.
Differential Revision: http://reviews.llvm.org/D17038

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260401 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-10 18:32:01 +00:00
Nemanja Ivanovic 591a727559 Fix for PR 26193
This is a simple fix for a PowerPC intrinsic that was incorrectly defined
(the return type was incorrect).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259886 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-05 14:50:29 +00:00
Nemanja Ivanovic e0a5f73cd5 Fix for PR 26356
Using the load immediate only when the immediate (whether signed or unsigned)
can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and
0 to 65535 for unsigned. This patch also ensures that we sign-extend under the
right conditions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259840 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-04 23:14:42 +00:00
Nemanja Ivanovic d8ce794248 Fix for PR 26381
Simple fix - Constant values were not being sign extended in FastIsel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259645 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 12:53:38 +00:00
Kyle Butt ee53ec02b6 Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates.
The purpose of PPCVSXFMAMutate is to elide copies by changing FMA forms
on PPC.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg7
    ;v6 = v6 + v5 * v7

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg7, %vreg96
    ;v5 = v5 * v7 + v96

This was broken in the case where the target register was also used as a
multiplicand. Fix this case by checking for it and replacing both uses
with the copied register.

    %vreg6<def> = COPY %vreg96
    %vreg6<def,tied1> = XSMADDASP %vreg6<tied0>, %vreg5<kill>, %vreg6
    ;v6 = v6 + v5 * v6

is replaced by

    %vreg5<def,tied1> = XSMADDMSP %vreg5<tied0>, %vreg96, %vreg96
    ;v5 = v5 * v96 + v96

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-03 01:41:09 +00:00
Eric Christopher f704e77392 Refactor common code for PPC fast isel load immediate selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259178 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-29 07:20:30 +00:00
Eric Christopher d1416a5661 Since LI/LIS sign extend the constant passed into the instruction we should
check that the sign extended constant fits into 16-bits if we want a
zero extended value, otherwise go ahead and put it together piecemeal.

Fixes PR26356.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259177 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-29 07:20:01 +00:00
Eric Christopher f25be927dc Fix up conditional formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259176 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-29 07:19:49 +00:00
Adam Nemet 35ef8f155d [TTI] Add getPrefetchDistance from PPCLoopDataPrefetch, NFC
This patch is part of the work to make PPCLoopDataPrefetch
target-independent
(http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758).

As it was discussed in the above thread, getPrefetchDistance is
currently using instruction count which may change in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258995 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 22:21:25 +00:00
Benjamin Kramer d254be2cd3 Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/
It's a SelectionDAG thing, not a Target thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258939 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 16:32:26 +00:00
Benjamin Kramer 030c9dc308 Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258917 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-27 10:01:28 +00:00
Chris Bieneman caeade4234 Remove autoconf support
Summary:
This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html

"I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened."
- Obi Wan Kenobi

Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark

Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D16471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258861 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 21:29:08 +00:00
Benjamin Kramer b6242a88c2 Reflect the MC/MCDisassembler split on the include/ level.
No functional change, just moving code around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258818 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-26 16:44:37 +00:00
Adam Nemet c0ed657c76 [TTI] Add getCacheLineSize
Summary:
And use it in PPCLoopDataPrefetch.cpp.

@hfinkel, please let me know if your preference would be to preserve the
ppc-loop-prefetch-cache-line option in order to be able to override the
value of TTI::getCacheLineSize for PPC.

Reviewers: hfinkel

Subscribers: hulx2000, mcrosier, mssimpso, hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D16306

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258419 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-21 18:28:36 +00:00
Manuel Jacob 75e1cfb035 GlobalValue: use getValueType() instead of getType()->getPointerElementType().
Reviewers: mjacob

Subscribers: jholewinski, arsenm, dsanders, dblaikie

Patch by Eduard Burtescu.

Differential Revision: http://reviews.llvm.org/D16260


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257999 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-16 20:30:46 +00:00
Kyle Butt 644d34b2d4 Codegen: [PPC] Silence false-positive initialization warning. NFC
Some compilers don't do exhaustive switch checking. For those compilers,
add an initialization to prevent un-initialized variable warnings from
firing. For compilers with exhaustive switch checking, we still get a
guarantee that the switch is exhaustive, and hence the initializations
are redundant, and a non-functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257923 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-15 19:20:06 +00:00
JF Bastien ad2da49a99 WebAssembly: fix build break introduced by ELFObjectWriter churn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257709 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 23:36:00 +00:00
Rafael Espindola fdba645465 Convert a few assert failures into proper errors.
Fixes PR25944.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257697 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 22:56:57 +00:00
Ulrich Weigand dc8dfe1b86 [PowerPC] Fix large code model with the ELFv2 ABI
The global entry point prologue currently assumes that the TOC
associated with a function is less than 2GB away from the function
entry point.  This is always true when using the medium or small
code model, but may not be the case when using the large code model.

This patch adds a new variant of the ELFv2 global entry point prologue
that lifts the 2GB restriction when building with -mcmodel=large.
This works by emitting a quadword containing the distance from the
function entry point to its associated TOC immediately before the
entry point, and then using a prologue like:

ld r2,-8(r12)
add r2,r2,r12

Since creation of the entry point prologue is now split across two
separate routines (PPCLinuxAsmPrinter::EmitFunctionEntryLabel emits
the data word, PPCLinuxAsmPrinter::EmitFunctionBodyStart the prolog
code), I've switched to using named labels instead of just temporaries
to indicate the locations of the global and local entry points and the
new TOC offset data word.

These names are provided by new routines in PPCFunctionInfo modeled
after the existing PPCFunctionInfo::getPICOffsetSymbol.

Note that a corresponding change was committed to GCC here:
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00355.html

Reviewers: hfinkel

Differential Revision: http://reviews.llvm.org/D15500



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257597 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-13 13:12:23 +00:00
Kyle Butt 703fd28e42 Codegen: [PPC] Handle weighted comparisons when inserting selects.
Only non-weighted predicates were handled in PPCInstrInfo::insertSelect. Handle
the weighted predicates as well.

This latent bug was triggered by r255398, because it added use of the
branch-weighted predicates.

While here, switch over an enum instead of an int to get the compiler to enforce
totality in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257518 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-12 21:00:43 +00:00
Nemanja Ivanovic 2a613d664f Prevent renaming of CR fields in AADB when a CR restore is present
This patch corresponds to review:
http://reviews.llvm.org/D15930

Moves to and from CR fields depend on shifts/masks that depend on the
target/source CR field. Thus, post-ra anti-dep breaking must not later
change that CR register assignment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257168 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-08 13:09:54 +00:00
Kyle Butt e51b530b12 Add call sequence start and end for __tls_get_addr
This is a fix for bug http://llvm.org/bugs/show_bug.cgi?id=25839.

For a PIC TLS variable access in a function, prologue (mflr followed by std and
stdu) gets scheduled after a tls_get_addr call. tls_get_addr messed up LR but
no one saves/restores it.

Also added a test for save/restore clobbered registers during calling __tls_get_addr.

Patch by Tim Shen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257137 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-08 02:06:19 +00:00
Alexander Kornienko 058ac9c6df Refactor: Simplify boolean conditional return statements in lib/Target/PowerPC
Summary: Use clang-tidy to simplify boolean conditional return statements

Reviewers: uweigand, rafael, wschmidt

Subscribers: craig.topper, llvm-commits

Patch by Richard Thomson!

Differential Revision: http://reviews.llvm.org/D9984


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-28 13:38:42 +00:00
Craig Topper 30e7d038e9 Remove extra forward declarations and scrub includes for all in tree InstPrinters. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-25 22:10:01 +00:00
Cong Hou 40288f7238 [BPI] Replace weights by probabilities in BPI.
This patch removes all weight-related interfaces from BPI and replace
them by probability versions. With this patch, we won't use edge weight
anymore in either IR or MC passes. Edge probabilitiy is a better
representation in terms of CFG update and validation.


Differential revision: http://reviews.llvm.org/D15519 




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256263 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-22 18:56:14 +00:00
Rafael Espindola adb5a4d946 Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255894 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-17 14:19:52 +00:00
Ahmed Bougacha 411b15e22e [CodeGen] Make MachineInstrBuilder::copyImplicitOps const. NFC.
This matches the other MIB methods, none of which modify the builder.
Without this, we can't chain copyImplicitOps.
Also reformat the few users, in PPCEarlyReturn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-16 22:15:30 +00:00
Justin Bogner 591c3d8fe6 LPM: Stop threading Pass * through all of the loop utility APIs. NFC
A large number of loop utility functions take a `Pass *` and reach
into it to find out which analyses to preserve. There are a number of
problems with this:

- The APIs have access to pretty well any Pass state they want, so
  it's hard to tell what they may or may not do.

- Other APIs have copied these and pass around a `Pass *` even though
  they don't even use it. Some of these just hand a nullptr to the API
  since the callers don't even have a pass available.

- Passes in the new pass manager don't work like the current ones, so
  the APIs can't be used as is there.

Instead, we should explicitly thread the analysis results that we
actually care about through these APIs. This is both simpler and more
reusable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-15 19:40:57 +00:00
Nemanja Ivanovic 21258ed080 Bitcasts between FP and INT values using direct moves
This patch corresponds to review:
http://reviews.llvm.org/D15286

This patch was meant to land in revision 255246, but I accidentally uploaded
the patch that corresponds to http://reviews.llvm.org/D15372 in that revision
accidentally.

Thereby, this patch is the actual Bitcasts using direct moves patch, whereas
http://reviews.llvm.org/rL255246 actually corresponds to
http://reviews.llvm.org/D15372.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255649 91177308-0d34-0410-b5e6-96231b3b80d8
2015-12-15 14:50:34 +00:00