135456 Commits

Author SHA1 Message Date
Daniel Berlin
e37b4fdf43 Fix unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276050 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 23:08:08 +00:00
Paul Robinson
9ab63168a0 Make GVN Hoisting obey optnone/bisect.
Differential Revision: http://reviews.llvm.org/D22545


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276048 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:57:14 +00:00
Daniel Berlin
aee8a35ce9 Make MemorySSA::dominates/locallydominates constant time
Summary: Make MemorySSA::dominates/locallydominates constant time

Reviewers: george.burgess.iv, gberry

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22527

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276046 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:49:43 +00:00
Chandler Carruth
df36f1ccea Add AIX support to Path.inc, Host.h, and CMake.
Patch by Andrew Paprocki!

Differential Revision: https://reviews.llvm.org/D18359

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276045 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:46:39 +00:00
Matthias Braun
c5e14e0478 RegScavenging: Add scavengeRegisterBackwards()
This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276044 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:37:09 +00:00
Matthias Braun
e07c066cdd RegisterScavenger: Introduce backward() mode.
This adds two pieces:
- RegisterScavenger:::enterBasicBlockEnd() which behaves similar to
  enterBasicBlock() but starts tracking at the end of the basic block.
- A RegisterScavenger::backward() method. It is subtly different
  from the existing unprocess() method which only considers uses with
  the kill flag set: If a value is dead at the end of a basic block with
  a last use inside the basic block, unprocess() will fail to mark it as
  live. However we cannot change/fix this behaviour because unprocess()
  needs to perform the exact reverse operation of forward().

Differential Revision: http://reviews.llvm.org/D21873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276043 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:37:02 +00:00
Sanjay Patel
6f62be2e5b regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276042 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:32:15 +00:00
Evandro Menezes
bc05d15136 [AArch64] Properly validate the reciprocal estimation.
Add check for legal data types when expanding into a Newton series.

Differential Revision: https://reviews.llvm.org/D22267

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276041 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:31:11 +00:00
Sanjay Patel
11faea381f [InstCombine] fold add(zext(xor X, C), C) --> sext X when C is INT_MIN in the source type
The pattern may look more obviously like a sext if written as:

  define i32 @g(i16 %x) {
    %zext = zext i16 %x to i32
    %xor = xor i32 %zext, 32768
    %add = add i32 %xor, -32768
    ret i32 %add
  }

We already have that fold in visitAdd().

Differential Revision: https://reviews.llvm.org/D22477



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276035 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 22:09:34 +00:00
George Burgess IV
fed9fd5a7a Attempt to appease MSVC buildbots.
Broken by r276026.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276032 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 21:35:47 +00:00
Davide Italiano
f36cce1574 [AMDGPU] Remove spurious line (should've been removed in r276029).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276030 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 21:16:30 +00:00
Davide Italiano
5012465830 [AMDGPU] Remove dead code.
LGTM'd by Matt Arsenault.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276029 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 21:10:49 +00:00
George Burgess IV
bfc580351a [CFLAA] Make a test tell the truth. NFC.
Dishonesty noted by Jia Chen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276028 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:56:41 +00:00
George Burgess IV
1caa063db8 [CFLAA] Add some interproc. analysis to CFLAnders.
This patch adds function summary support to CFLAnders. It also comes
with a lot of tests! Woohoo!

Patch by Jia Chen.

Differential Revision: https://reviews.llvm.org/D22450


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276026 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:47:15 +00:00
Kevin Enderby
fa9076153b Next step along the way to getting good error messages for bad archives.
This step builds on Lang Hames work to change Archive::child_iterator
for better interoperation with Error/Expected.  Building on that it is now
possible to return an error message when the size field of an archive
contains non-decimal characters.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276025 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:47:07 +00:00
Sanjay Patel
5f33cbe2bf add even more missing tests for simplifySelectBitTest()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276024 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:47:00 +00:00
George Burgess IV
058f700b77 [CFLAA] Teach CFLAnders to distinguish reads from writes.
This patch adds more specific edges to CFLAndersAliasAnalysis. The goal
of these edges is to give us more information about *how* two values
that MayAlias alias. With this, we can now tell cases like

a = b; // ergo, a may alias b

apart from

a = c;
b = c;

// so, a may alias b, but only because they were both assigned to c.

...And others.

Patch by Jia Chen.

Differential Revision: https://reviews.llvm.org/D22429


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276023 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:38:21 +00:00
Aaron Ballman
de4fbfe935 This code block breaks the docs build (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11921/steps/docs-llvm-html/logs/stdio). Setting the code highlighting to none instead of llvm to hopefully get the bot stumbling back towards green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276018 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:20:03 +00:00
Rafael Espindola
75cca7a098 Use posix_fallocate instead of ftruncate.
This makes sure that space is actually available. With this change
running lld on a full file system causes it to exit with

failed to open foo: No space left on device

instead of crashing with a sigbus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276017 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:19:56 +00:00
Vedant Kumar
ea47fc5fc9 [tsan] Don't instrument __llvm_gcov_global_state_pred or __llvm_gcda*
r274801 did not go far enough to allow gcov+tsan to cooperate. With this
commit it's possible to run the following code without false positives:

  std::thread T1(fib), T2(fib);
  T1.join(); T2.join();

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276015 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 20:16:08 +00:00
Tim Northover
b2e69d912a ARM: move feature for Thumb2 pkhbt/pkhtb onto architectures.
There's not much functional change, but it really is an architectural feature
(on v6T2, v7A, v7R and v7EM) rather than something each CPU implements
individually.

The main functional change is the default behaviour you get when specifying
only "-triple".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276013 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 19:49:13 +00:00
Ahmed Bougacha
98d2ab3a50 [GlobalISel] Mark newly-created gvregs as having a bank.
Also verify that we never try to set the size of a vreg associated
to a register class.

Report an error when we encounter that in MIR. Fix a testcase that
hit that error and had a size for no reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276012 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 19:48:36 +00:00
Ahmed Bougacha
e627715b1b [GlobalISel] Simplify more RegClassOrRegBank is+get. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276011 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 19:47:06 +00:00
David Majnemer
baf88b3b1a [FunctionAttrs] Correct the safety analysis for inference of 'returned'
We skipped over ReturnInsts which didn't return an argument which would
lead us to incorrectly conclude that an argument returned by another
ReturnInst was 'returned'.

This reverts commit r275756.

This fixes PR28610.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276008 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 18:50:26 +00:00
Davide Italiano
bd7732211f [SCCP] Improve assert messages. NFCI.
I've been hitting those already while working on SCCP and I think
it's be useful to provide a more explanatory diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276007 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 18:31:07 +00:00
Kostya Serebryany
3487192114 [libFuzzer] properly intercept memmem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276006 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 18:29:06 +00:00
Chad Rosier
fbab381e3c [DSE] Add additional debug output. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276005 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 18:11:11 +00:00
David Majnemer
3c8951d73e Add a testcase for r275581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276002 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:52:41 +00:00
David Majnemer
a05b1c3601 [RegionInfo] Some cleanups
- Use unique_ptr instead of managing a container of new'd pointers.
- Use range based for loops.

No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276001 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:50:30 +00:00
David Majnemer
2666c82a8d [RegionPass] Some minor cleanups
No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276000 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:50:27 +00:00
David Majnemer
55bd48f157 [LoopPass] Some minor cleanups
No functional change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275999 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:50:24 +00:00
Aaron Ballman
ce04fe5f8e This code block breaks the docs build (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11920/steps/docs-llvm-html/logs/stdio), but I cannot see anything immediately wrong with it and cannot reproduce the diagnostic locally. Setting the code highlighting to none instead of nasm to hopefully get the bot stumbling back towards green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275998 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:46:55 +00:00
Sanjay Patel
d9f3c5ebc0 add tests related to PR28466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275995 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:07:35 +00:00
Simon Pilgrim
259dd35565 [X86][AVX512] Added AVX512 subvector broadcast tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275994 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 17:04:28 +00:00
Simon Pilgrim
5d55323a67 [X86][AVX] Fixed typo in test names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275992 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 16:52:05 +00:00
Chad Rosier
33f915946e [DSE] Add additional debug output. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275991 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 16:50:57 +00:00
Sanjay Patel
779845c3ce add missing test for simplifySelectBitTest()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275990 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 16:49:55 +00:00
Tobias Grosser
65165b21da [InstCombine] Enable cast-folding in logic(cast(icmp), cast(icmp))
Summary:
Currently, InstCombine is already able to fold expressions of the form `logic(cast(A), cast(B))` to the simpler form `cast(logic(A, B))`, where logic designates one of `and`/`or`/`xor`. This transformation is implemented in `foldCastedBitwiseLogic()` in InstCombineAndOrXor.cpp. However, this optimization will not be performed if both `A` and `B` are `icmp` instructions. The decision to preclude casts of `icmp` instructions originates in r48715 in combination with r261707, and can be best understood by the title of the former one:

> Transform (zext (or (icmp), (icmp))) to (or (zext (cimp), (zext icmp))) if at least one of the (zext icmp) can be transformed to eliminate an icmp.

Apparently, it introduced a transformation that is a reverse of the transformation that is done in `foldCastedBitwiseLogic()`. Its purpose is to expose pairs of `zext icmp` that would subsequently be optimized by `transformZExtICmp()` in InstCombineCasts.cpp. Therefore, in order to avoid an endless loop of switching back and forth between these two transformations, the one in `foldCastedBitwiseLogic()` has been restricted to exclude `icmp` instructions which is mirrored in the responsible check:

`if ((!isa<ICmpInst>(Cast0Src) || !isa<ICmpInst>(Cast1Src)) && ...`

This check seems to sort out more cases than necessary because:
- the reverse transformation is obviously done for `or` instructions only
- and also not every `zext icmp` pair is necessarily the result of this reverse transformation

Therefore we now remove this check and replace it by a more finegrained one in `shouldOptimizeCast()` that now rejects only those `logic(zext(icmp), zext(icmp))` that would be able to be optimized by `transformZExtICmp()`, which also avoids the mentioned endless loop. That means we are now able to also simplify expressions of the form `logic(cast(icmp), cast(icmp))` to `cast(logic(icmp, icmp))` (`cast` being an arbitrary `CastInst`).

As an example, consider the following IR snippet

```
%1 = icmp sgt i64 %a, %b
%2 = zext i1 %1 to i8
%3 = icmp slt i64 %a, %c
%4 = zext i1 %3 to i8
%5 = and i8 %2, %4
```

which would now be transformed to

```
%1 = icmp sgt i64 %a, %b
%2 = icmp slt i64 %a, %c
%3 = and i1 %1, %2
%4 = zext i1 %3 to i8
```

This issue became apparent when experimenting with the programming language Julia, which makes use of LLVM. Currently, Julia lowers its `Bool` datatype to LLVM's `i8` (also see https://github.com/JuliaLang/julia/pull/17225). In fact, the above IR example is the lowered form of the Julia snippet `(a > b) & (a < c)`. Like shown above, this may introduce `zext` operations, casting between `i1` and `i8`, which could for example hinder ScalarEvolution and Polly on certain code.

Reviewers: grosser, vtjnash, majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D22511

Contributed-by: Matthias Reisinger

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275989 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 16:39:17 +00:00
Matt Arsenault
1ce58d721f AMDGPU: Only use legal inline immediates with kill pseudo
Only if the value is negative or positive is what matters,
so use a constant that doesn't require an instruction to
materialize.

These should really just emit the write exec directly,
but for stick with the kill pseudo-terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275988 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 16:27:56 +00:00
Simon Pilgrim
0f9cdd21cd [X86][SSE] Reimplement SSE fp2si conversion intrinsics instead of using generic IR
D20859 and D20860 attempted to replace the SSE (V)CVTTPS2DQ and VCVTTPD2DQ truncating conversions with generic IR instead.

It turns out that the behaviour of these intrinsics is different enough from generic IR that this will cause problems, INF/NAN/out of range values are guaranteed to result in a 0x80000000 value - which plays havoc with constant folding which converts them to either zero or UNDEF. This is also an issue with the scalar implementations (which were already generic IR and what I was trying to match).

This patch changes both scalar and packed versions back to using x86-specific builtins.

It also deals with the other scalar conversion cases that are runtime rounding mode dependent and can have similar issues with constant folding.

A companion clang patch is at D22105

Differential Revision: https://reviews.llvm.org/D22106

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275981 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 15:07:43 +00:00
Sam Parker
aa39b5574e [ARM] Refactor Thumb2 Mul and Mla instr descs
Recommitting after r274347 was reverted. This patch introduces some
classes to refactor the 3 and 4 register Thumb2 multiplication
instruction descriptions, plus improved tests for some of those
instructions.

Differential Revision: https://reviews.llvm.org/D21929



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275979 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 14:44:05 +00:00
Pankaj Gode
7f3b30491a [AArch64] PredictableSelectIsExpensive for Vulcan.
Adding PredictableSelectIsExpensive for Vulcan

Differential Revision: https://reviews.llvm.org/D22448



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275978 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 14:30:21 +00:00
Peter Smith
ca1d6a6554 Add support for tlsldm assembler operator to ARM target
The standard local dynamic model for TLS on ARM systems needs two 
relocations:
- R_ARM_TLS_LDM32 (module idx)
- R_ARM_TLS_LDO32 (offset of object from origin of module TLS block)
    
In GNU style assembler we use symbol(tlsldm) and symbol(tlsldo) to
produce these relocations.
    
llvm-mc for ARM supports symbol(tlsldo) but does not support symbol(tlsldm).
This patch wires up the existing symbol(tlsldm) to R_ARM_TLS_LDM32.
    
TLS for ARM is defined in Addenda to, and Errata in, the ABI for the
ARM Architecture
    
Differential Revision: https://reviews.llvm.org/D22461



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275977 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 14:15:33 +00:00
Simon Pilgrim
c964a662f4 [AARCH64] Fix linu triple typo
As promised in D22191

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275976 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 14:12:45 +00:00
Simon Pilgrim
e927841848 [AARCH64] Enable AARCH64 lit tests on windows dev machines
As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows

This will hopefully help stop cases where windows developers break the aarch64 target

Differential Revision: https://reviews.llvm.org/D22191

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275973 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 13:35:11 +00:00
Simon Pilgrim
3c626683b7 Get rid of VS2015 operator precedence warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275971 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 12:26:51 +00:00
Daniel Sanders
6b209b804f [mips][ias] R_MIPS_GOT_(PAGE|OFST) do not need symbols
Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: https://reviews.llvm.org/D22458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275968 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 10:58:06 +00:00
Daniel Sanders
0f320a4f3b [mips] Correct label prefixes for N32 and N64.
Summary:
N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own
($).

This fixes the majority of object differences between -fintegrated-as and
-fno-integrated-as.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22412



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275967 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 10:49:03 +00:00
Daniel Sanders
6019c79198 [mips] Recognise the triple used by Debian stretch for mips64el.
Summary:
The triple used for this distribution is mips64el-linux-gnuabi64.

Reviewers: sdardis

Subscribers: sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22406


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275966 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 10:22:19 +00:00
Tobias Grosser
0f7fca90ac [InstCombine] Minor cleanup of cast simplification code [NFC]
Summary:
This patch cleans up parts of InstCombine to raise its compliance with the LLVM coding standards and to increase its readability. The changes and according rationale are summarized in the following:

- Rename `ShouldOptimizeCast()` to `shouldOptimizeCast()` since functions should start with a lower case letter.

- Move `shouldOptimizeCast()` from InstCombineCasts.cpp to InstCombineAndOrXor.cpp since it's only used there.

- Simplify interface of `shouldOptimizeCast()`.

- Minor code style adaptions in `shouldOptimizeCast()`.

- Remove the documentation on the function definition of `shouldOptimizeCast()` since it just repeats the documentation on its declaration. Also enhance the documentation on its declaration with more information describing its intended use and make it doxygen-compliant.

- Change a comment in `foldCastedBitwiseLogic()` from `fold (logic (cast A), (cast B)) -> (cast (logic A, B))` to `fold logic(cast(A), cast(B)) -> cast(logic(A, B))` since the surrounding comments use this format.

- Remove comment `Only do this if the casts both really cause code to be generated.` in `foldCastedBitwiseLogic()` since it just repeats parts of the documentation of `shouldOptimizeCast()` and does not help to improve readability.

- Simplify the interface of `isEliminableCastPair()`.

- Removed the documentation on the function definition of `isEliminableCastPair()` which only contained obvious statements about its implementation. Instead added more general doxygen-compliant documentation to its declaration.

- Renamed parameter `DoXform` of `transformZExtIcmp()` to `DoTransform` to make its intention clearer.

- Moved documentation of `transformZExtIcmp()` from its definition to its declaration and made it doxygen-compliant.

Reviewers: vtjnash, grosser

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D22449

Contributed-by: Matthias Reisinger

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275964 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-19 09:06:08 +00:00