2 Commits

Author	SHA1	Message	Date
Matt Arsenault	5b56cc85b0	Rename ExpandISelPseudo->FinalizeISel, delay register reservation ... This allows targets to make more decisions about reserved registers after isel. For example, now it should be certain there are calls or stack objects in the frame or not, which could have been introduced by legalization. Patch by Matthias Braun git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363757 91177308-0d34-0410-b5e6-96231b3b80d8	2019-06-19 00:25:39 +00:00
Simon Dardis	90bb2289e6	[mips] Correct the definitions of the unaligned word memory operation instructions ... These instructions lacked the correct predicates, were not marked as loads and stores and lacked the proper instruction mapping information. In the case of microMIPS sw(l|r)e (EVA) these instructions were using the load EVA description. Reviewers: abeserminji, smaksimovic, atanasyan Differential Revision: https://reviews.llvm.org/D45626 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330326 91177308-0d34-0410-b5e6-96231b3b80d8	2018-04-19 13:33:51 +00:00