Commit Graph

6 Commits

Author SHA1 Message Date
Sanjay Patel 027b3fb56c [x86] split 256-bit store of concatenated vectors
This shows up as a side issue to the main problem for the AVX target example from PR37428:
https://bugs.llvm.org/show_bug.cgi?id=37428 - https://godbolt.org/z/7tpRa3

But as we can see in the pile of existing test diffs, it's actually a widespread problem
that affects any AVX or later target. Apart from a couple of oddballs, I think these are
all improvements for the reasons stated in the code comment: we do not want to enable YMM
unnecessarily (avoid vzeroupper and frequency throttling) and some cores split 256-bit
stores anyway.

We could say that MergeConsecutiveStores() is going overboard on some of these examples,
but that won't solve the problem completely. But that is a reason I'm proposing this as
a lowering rather than a combine: we will infinite loop fighting the merge code if we try
this earlier.

Differential Revision: https://reviews.llvm.org/D62498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362524 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-04 16:40:04 +00:00
Sanjay Patel 6ec4689617 Revert "[x86] split 256-bit store of concatenated vectors"
This reverts commit d5a8637072f4c556b88156bd2f6237a2ead47d31.

Most likely suspect for this bot failure:
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-avx2-linux/builds/9684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361850 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-28 17:37:58 +00:00
Sanjay Patel 974d33f2a3 [x86] split 256-bit store of concatenated vectors
This shows up as a side issue to the main problem for the AVX target example from PR37428:
https://bugs.llvm.org/show_bug.cgi?id=37428 - https://godbolt.org/z/7tpRa3

But as we can see in the pile of existing test diffs, it's actually a widespread problem
that affects any AVX or later target. Apart from a couple of oddballs, I think these are
all improvements for the reasons stated in the code comment: we do not want to enable YMM
unnecessarily (avoid vzeroupper and frequency throttling) and some cores split 256-bit
stores anyway.

We could say that MergeConsecutiveStores() is going overboard on some of these examples,
but that won't solve the problem completely. But that is the reason I'm proposing this as
a lowering rather than a combine: we will infinite loop fighting the merge code if we try
this earlier.

Differential Revision: https://reviews.llvm.org/D62498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361822 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-28 13:54:17 +00:00
Simon Pilgrim 2fa97aca16 [X86][AVX] Enabled AVX512F tests and add PR40815 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359401 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-28 15:04:30 +00:00
Simon Pilgrim 5378974fba Fix check-prefixes typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359382 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-27 15:41:14 +00:00
Simon Pilgrim 93fdfcf73b [X86][SSE] Add initial test case for subvector insert/extract of illegal types
Suggested by @nikic on D59188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359379 91177308-0d34-0410-b5e6-96231b3b80d8
2019-04-27 15:30:06 +00:00