185620 Commits

Author SHA1 Message Date
Craig Topper
9e847d733b [X86][TableGen] Allow timm to appear in output patterns. Use it to remove ConvertToTarget opcodes from the X86 isel table.
We're now using a lot more TargetConstant nodes in SelectionDAG.
But we were still telling isel to convert some of them
to TargetConstants even though they already are. This is because
isel emits a conversion anytime the output pattern has a an 'imm'.
I guess for patterns in instructions we take the 'timm' from the
'set' pattern, but for Pat patterns with explcicit output we
previously had to say 'imm' since 'timm' wasn't allowed in outputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372525 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 19:49:39 +00:00
Roman Lebedev
a6b2442416 [NFC][X86] Add BEXTR test with load and 33-bit mask (PR43381 / D67875)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372524 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 19:36:38 +00:00
Craig Topper
23e7480453 [X86] Update commutable EVEX vcmp patterns to use timm instead of imm.
We need to match TargetConstant, not Constant. This was broken
in r372338, but we lacked test coverage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372523 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 19:06:13 +00:00
Craig Topper
717ea5bcda [X86] Add more tests for commuting evex vcmp instructions during isel to fold a load.
Some of the isel patterns were not updated to check for
TargetConstant instead of Constant in r372338.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372522 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 19:06:08 +00:00
Simon Pilgrim
4432ce935e [SelectionDAG] computeKnownBits/ComputeNumSignBits - cleanup demanded/unknown paths. NFCI.
Merge the calls, just adjust the demandedelts if we have a valid extract_subvector constant index, else demand all elts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372521 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 18:47:12 +00:00
Simon Pilgrim
7d260801fe [XRay] Silence static analyzer dyn_cast<BufferExtents> null dereference warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372520 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 18:47:00 +00:00
Simon Pilgrim
1302423e7e [LSR] Silence static analyzer null dereference warnings with assertions. NFCI.
Add assertions to make it clear that GenerateIVChain / NarrowSearchSpaceByPickingWinnerRegs should succeed in finding non-null values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372518 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 17:59:24 +00:00
Simon Pilgrim
45d7a8821e ConstantHoisting - Silence static analyzer dyn_cast<PointerType> null dereference warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372517 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 17:45:05 +00:00
Nico Weber
fdece6bce9 gn build: Friendlier error on invalid entries in llvm_targets_to_build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372515 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 16:48:20 +00:00
Simon Pilgrim
3ff0f3bdeb [Cost][X86] Add more missing vector truncation costs
The AVX512 cases still need some work to correct recognise the PMOV truncation cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372514 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 16:46:15 +00:00
Nico Weber
6c56f29d88 gn build: consolidate "Nothing to do" branches in targets.gni
No behavior change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372512 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 15:42:40 +00:00
Sanjay Patel
7c6724540c [InstCombine] allow icmp+binop folds before min/max bailout (PR43310)
This has the potential to uncover missed analysis/folds as shown in the
min/max code comment/test, but fewer restrictions on icmp folds should
be better in general to solve cases like:
https://bugs.llvm.org/show_bug.cgi?id=43310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372510 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 14:31:53 +00:00
Sanjay Patel
0869ecd09e [InstCombine] add tests for icmp fold hindered by min/max; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372509 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 14:23:22 +00:00
Simon Pilgrim
1bcb4638bd Fix uninitialized variable warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372508 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:43:21 +00:00
Simon Pilgrim
280ad61e0b [AArch64] AArch64StackTagging - Silence static analyzer dyn_cast<> null dereference warning. NFCI.
The static analyzer is warning about potential null dereferences, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372507 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:43:12 +00:00
Nico Weber
338309becd gn build: Add missing RISCV to llvm_targets_to_build="all"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372506 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:41:38 +00:00
Nico Weber
8c63da040a gn build: Add build files for llvm/lib/Target/AVR
Differential Revision: https://reviews.llvm.org/D67872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372505 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:17:38 +00:00
Simon Pilgrim
b4a96fc03f [NVPTX] NVPTXLowerAggrCopies - Silence static analyzer dyn_cast<StoreInst> null dereference warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372504 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:14:30 +00:00
Simon Pilgrim
5bfb8c3a24 [Lanai] LanaiAsmParser - Silence static analyzer dyn_cast null dereference warnings. NFCI.
We were already doing this dyn_cast && isa<> && cast<> pattern for some add*Operands methods, just do this more consistently to stop clang static analyzer warning so much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372503 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:14:21 +00:00
Simon Pilgrim
6f38245a4a [VPlan] Silence static analyzer dyn_cast null dereference warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372502 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:02:00 +00:00
Simon Pilgrim
a5d8a62b00 AMDGPUPrintfRuntimeBinding - silence static analyzer null dereference warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372501 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 13:01:49 +00:00
Simon Pilgrim
e5754e0c85 [MIPS] Don't dereference dyn_cast<> Constant results. NFCI.
The static analyzer is warning about potential null dereferences, but we should be able to use cast<> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372500 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 12:38:32 +00:00
Simon Pilgrim
f82198cb7d [Hexagon] Don't dereference dyn_cast<ConstantFPSDNode> result. NFCI.
The static analyzer is warning about potential null dereference, but we should be able to use cast<ConstantFPSDNode> directly and if not assert will fire for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372499 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 12:38:21 +00:00
Simon Pilgrim
0a8c54aac9 [Cost][X86] Add v2i64 truncation costs
We are missing costs for a lot of truncation cases, I'm hoping to address all the 'zero cost' cases in trunc.ll

I thought this was a vector widening side effect, but even before this we had some interesting LV decisions (notably over indvars) being made due to these zero costs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372498 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 12:04:38 +00:00
Benjamin Kramer
ddc7b9f8e1 Move classes into anonymous namespaces. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372495 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 09:28:47 +00:00
Craig Topper
65e2795281 [X86] Add test memset and memcpy testcases for D67874. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372494 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-22 06:52:25 +00:00
Roman Lebedev
508196e3b0 [InstSimplify] simplifyUnsignedRangeCheck(): X >= Y && Y == 0 --> Y == 0
https://rise4fun.com/Alive/v9Y4

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372491 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 22:27:39 +00:00
Roman Lebedev
dcac5e7ae6 [InstSimplify][NFC] Reorganize simplifyUnsignedRangeCheck() to emphasize and/or symmetry
Only a single `X >= Y && Y == 0  -->  Y == 0` fold appears to be missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372490 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 22:27:28 +00:00
Roman Lebedev
be2fa16f7a [NFC][InstSimplify] Add exhaustive test coverage for simplifyUnsignedRangeCheck().
One case is not handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372489 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 22:27:18 +00:00
DeForest Richards
8f1c2d19c3 [Docs] Updates sidebar links
Adds sidebar links to mailing lists, IRC, and meetups and social events.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372488 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 21:05:20 +00:00
DeForest Richards
26a36e3392 [Docs] Adds new page for Getting Involved articles
Adds a new page for existing Getting Involved, Development Process, and Community Proposals articles. Also moves Mailing Lists, Meetups and social events, and IRC sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372487 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 20:56:40 +00:00
Martin Storsjo
2c6d86209f [CodeView] Add pragma push/pop_macro for ARM64_FPSR to enum header
This fixes (one aspect of) compilation of LLDB with MSVC for ARM64.

LLDB source files include intrin.h, and the MSVC intrin.h transitively
includes arm64intr.h, which has an ARM64_FPSR define, which clashes
with the enum declaration.

Differential Revision: https://reviews.llvm.org/D67864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372481 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 19:09:24 +00:00
Suyog Sarda
46ff2e05c5 SROA: Check Total Bits of vector type
While Promoting alloca instruction of Vector Type, 
Check total size in bits of its slices too.
If they don't match, don't promote the alloca instruction.

Bug : https://bugs.llvm.org/show_bug.cgi?id=42585



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372480 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 18:16:37 +00:00
Suyog Sarda
e241a62e3a Test mail. NFC.
Testing commit acces. NFC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372479 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 18:03:30 +00:00
Wei Mi
5de9e01200 Recommit [SampleFDO] Expose an interface to return the size of a section
or the size of the profile for profile in ExtBinary format.

Fix a test failure on Mac.

[SampleFDO] Expose an interface to return the size of a section or the
size of the profile for profile in ExtBinary format.

Sometimes we want to limit the size of the profile by stripping some functions
with low sample count or by stripping some function names with small text size
from profile symbol list. That requires the profile reader to have the
interfaces returning the size of a section or the size of total profile. The
patch add those interfaces.

At the same time, add some dump facility to show the size of each section.

Differential revision: https://reviews.llvm.org/D67726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372478 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 17:23:55 +00:00
Hideto Ueno
48db51b0f2 [Attributor] Implement "norecurse" function attribute deduction
Summary:
This patch introduces `norecurse` function attribute deduction.

`norecurse` will be deduced if the following conditions hold:
* The size of SCC in which the function belongs equals to 1.
* The function doesn't have self-recursion.
* We have `norecurse` for all call site.

To avoid a large change, SCC is calculated using scc_iterator in InfoCache initialization for now.

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67751

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372475 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 15:13:19 +00:00
Fangrui Song
b3a6782005 [Support] Add a DataExtractor constructor that takes ArrayRef<uint8_t>
The new constructor can simplify some llvm-readobj call sites.

Reviewed By: grimar, dblaikie

Differential Revision: https://reviews.llvm.org/D67797

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372473 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 15:05:03 +00:00
DeForest Richards
b014fe6032 [Docs] Bug fix for document not included in toctree
Fixes 'document not included in toctree' bug for FAQ and Lexicon topics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372470 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 14:29:19 +00:00
DeForest Richards
ef35288d2f [Docs] Updates sidebar links
Adds additional links to sidebar. Also removes Glossary and FAQ from LLVM Design & Overview section. (These links now reside on the sidebar.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372469 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 14:17:09 +00:00
Roman Lebedev
482961ebd8 [NFC][X86] Adjust check prefixes in bmi.ll (PR43381)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372468 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 11:12:55 +00:00
Amara Emerson
bca591ab2b [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64>
Simple continuation of existing selection support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372467 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 09:21:16 +00:00
Amara Emerson
f37518f804 [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64>
Just add an extra case to the existing selection logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372466 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 09:21:13 +00:00
Amara Emerson
1809a8891a [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372465 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 09:21:10 +00:00
Amara Emerson
3f5d05df68 Revert "[SampleFDO] Expose an interface to return the size of a section or the size"
This reverts commit f118852046a1d255ed8c65c6b5db320e8cea53a0.

Broke the macOS build/greendragon bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372464 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 09:11:51 +00:00
James Molloy
6d4a6cde0a [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount
Recommit: fix asan errors.

The way MachinePipeliner uses these target hooks is stateful - we reduce trip
count by one per call to reduceLoopCount. It's a little overfit for hardware
loops, where we don't have to worry about stitching a loop induction variable
across prologs and epilogs (the induction variable is implicit).

This patch introduces a new API:

  /// Analyze loop L, which must be a single-basic-block loop, and if the
  /// conditions can be understood enough produce a PipelinerLoopInfo object.
  virtual std::unique_ptr<PipelinerLoopInfo>
  analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const;

The return value is expected to be an implementation of the abstract class:

  /// Object returned by analyzeLoopForPipelining. Allows software pipelining
  /// implementations to query attributes of the loop being pipelined.
  class PipelinerLoopInfo {
  public:
    virtual ~PipelinerLoopInfo();
    /// Return true if the given instruction should not be pipelined and should
    /// be ignored. An example could be a loop comparison, or induction variable
    /// update with no users being pipelined.
    virtual bool shouldIgnoreForPipelining(const MachineInstr *MI) const = 0;

    /// Create a condition to determine if the trip count of the loop is greater
    /// than TC.
    ///
    /// If the trip count is statically known to be greater than TC, return
    /// true. If the trip count is statically known to be not greater than TC,
    /// return false. Otherwise return nullopt and fill out Cond with the test
    /// condition.
    virtual Optional<bool>
    createTripCountGreaterCondition(int TC, MachineBasicBlock &MBB,
                                 SmallVectorImpl<MachineOperand> &Cond) = 0;

    /// Modify the loop such that the trip count is
    /// OriginalTC + TripCountAdjust.
    virtual void adjustTripCount(int TripCountAdjust) = 0;

    /// Called when the loop's preheader has been modified to NewPreheader.
    virtual void setPreheader(MachineBasicBlock *NewPreheader) = 0;

    /// Called when the loop is being removed.
    virtual void disposed() = 0;
  };

The Pipeliner (ModuloSchedule.cpp) can use this object to modify the loop while
allowing the target to hold its own state across all calls. This API, in
particular the disjunction of creating a trip count check condition and
adjusting the loop, improves the code quality in ModuloSchedule.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372463 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 08:19:41 +00:00
Craig Topper
22c1c5c1d0 [X86] Use sse_load_f32/f64 and timm in patterns for memory form of vgetmantss/sd.
Previously we only matched scalar_to_vector and scalar load, but
we should be able to narrow a vector load or match vzload.

Also need to match TargetConstant instead of Constant. The register
patterns were previously updated, but not the memory patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372458 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 06:44:29 +00:00
Craig Topper
84fb038428 [X86] Add test case to show failure to fold load with getmantss due to isel pattern looking for Constant instead of TargetConstant
The intrinsic has an immarg so its gets created with a TargetConstant
instead of a Constant after r372338. The isel pattern was only
updated for the register form, but not the memory form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372457 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 06:44:24 +00:00
Nico Weber
e1b0d6e383 avr targetinfo: remove unneeded dep on MC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372451 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 02:43:32 +00:00
Matt Arsenault
f9dc386cbe AMDGPU/GlobalISel: Allow selection of scalar min/max
I believe all of the uniform/divergent pattern predicates are
redundant and can be removed. The uniformity bit already influences
the register class, and nothhing has broken when I've removed this and
others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372450 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 02:37:33 +00:00
Matt Arsenault
2c4dec4a0d LiveIntervals: Add missing operator!= for segments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@372449 91177308-0d34-0410-b5e6-96231b3b80d8
2019-09-21 02:37:28 +00:00