Anton Korobeynikov
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0fc32dae8f
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Add pattern for OR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:05:00 +00:00 |
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Anton Korobeynikov
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b8639f5214
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Cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70716 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:03:50 +00:00 |
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Anton Korobeynikov
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d2c94ae49e
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Add dummy lowering for shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:03:33 +00:00 |
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Anton Korobeynikov
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1476d97037
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We don't have any div at all - thus mark it as expensive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70714 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:03:14 +00:00 |
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Anton Korobeynikov
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1df221f2bb
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Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:02:04 +00:00 |
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Anton Korobeynikov
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dcb802cf7b
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Provide set of reserved registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 13:00:11 +00:00 |
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Anton Korobeynikov
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fd1b7c778c
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Add proper ISD::RET lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 12:59:50 +00:00 |
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Anton Korobeynikov
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c8fbb6ae20
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Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 12:59:33 +00:00 |
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Anton Korobeynikov
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f2c3e179ec
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Dummy MSP430 backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-05-03 12:57:15 +00:00 |
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