Summary:
According RISC-V ELF psABI specification, base RV32 and RV64 ISAs only
allow 32-bit instruction alignment, but instruction allow to be aligned
to 16-bit boundaries for C-extension.
So we just align to 4 bytes and 2 bytes for C-extension is enough.
Reviewers: asb, apazos
Differential Revision: https://reviews.llvm.org/D45560
Patch by Kito Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329899 91177308-0d34-0410-b5e6-96231b3b80d8
Shiva Chen