Dan Gohman
ef07158c11
Micro-optimize this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105542 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 19:12:54 +00:00
Jim Grosbach
41a628237c
Move exit check where it really belongs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105541 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 19:12:21 +00:00
Dan Gohman
4d52c6d622
Optimize ScalarEvolution's SCEVComplexityCompare predicate: don't go
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scrounging through SCEVUnknown contents and SCEVNAryExpr operands;
instead just do a simple deterministic comparison of the precomputed
hash data.
Also, since this is more precise, it eliminates the need for the slow
N^2 duplicate detection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105540 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 19:06:13 +00:00
Bill Wendling
22a5b29820
Create new accessors to get arguments for call/invoke instructions. It breaks
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encapsulation to force the users of these classes to know about the internal
data structure of the Operands structure. It also can lead to errors, like in
the MSIL writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 19:05:06 +00:00
Rafael Espindola
6c8099243a
Misc cleanups to the gold plugin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 16:45:22 +00:00
Nate Begeman
b0a4e4554e
clang codegen support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-07 16:00:37 +00:00
Kenneth Uildriks
3a4340d4cb
Partial specialization was not checking the callsite to make sure it was using the same constants as the specialization, leading to calls to the wrong specialization. Patch by Takumi Nakamura\!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105528 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 14:50:21 +00:00
Duncan Sands
431c3e7404
This bug is also present in MSVC10. Requested by Elrood on IRC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 12:40:43 +00:00
Chris Lattner
1087f54ddb
revert r105521, which is breaking the buildbots with stuff like this:
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In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a
Initial AVX support for some instructions. No patterns matched
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yet, only assembly encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 03:53:24 +00:00
Bruno Cardoso Lopes
270562b3d4
Teach tablegen to support 'defm' inside multiclasses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 02:11:52 +00:00
Dan Gohman
8613b18a5a
Make MachineFunctionPass::createPrinterPass private, as no subclasses
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should be calling it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 01:19:12 +00:00
Dale Johannesen
cf296fa162
Improvements to tail call code. No functional effect
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unless using -arm-tail-calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:51:39 +00:00
Dan Gohman
fdbef823ad
getFoldedOffsetOf no longer does anything special with vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:47:34 +00:00
Dan Gohman
70972bb5cd
No need to special-case structs here; structs are first-class now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:42:29 +00:00
Stuart Hastings
6d56b9fabc
Revert 105492 & 105493 due to a testcase regression. Radar 7424645.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105511 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:39:29 +00:00
Dan Gohman
25fcaff409
LSR needs to remember inserted instructions even in postinc mode, because
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there could be multiple subexpressions within a single expansion which
require insert point adjustment. This fixes PR7306.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:33:07 +00:00
Dale Johannesen
88004c25c7
Fix some liveout handling related to tail calls, see comments.
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I don't think this ever resulted in problems on x86, but it
would on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:30:45 +00:00
Dan Gohman
f2aac4db4e
Implement operator== and operator!= for SetVector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105508 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 00:26:02 +00:00
Devang Patel
7f508e8e10
test case for r105504.
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Radar 8055687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105505 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:47:41 +00:00
Evan Cheng
2b4e727c6f
Re-apply 105308 with fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:28:13 +00:00
Dan Gohman
a15ec5dfcc
Don't track users of undef values; they aren't interesting for
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register pressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:16:05 +00:00
Jim Grosbach
870c80540d
Make if-conversion ignore dbg_value instructions in its analysis. rdar://7797940
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105498 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 23:01:26 +00:00
Nate Begeman
9e584b37b0
Handle multi-vector returns and args.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 22:53:30 +00:00
Devang Patel
80ecc153ea
Update docs to reflect new DISubprogram elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 22:49:55 +00:00
Stuart Hastings
0f1b813567
Support for nested functions/classes in debug output. Radar 7424645.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 22:36:03 +00:00
Devang Patel
93031ac032
Copy location info for current function argument from dbg.declare if respective store instruction does not have any location info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 22:27:30 +00:00
Nate Begeman
7c21f747c7
Additional fixes to BuiltinsARM.def generator, on to clang codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105488 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 21:36:00 +00:00
Dale Johannesen
73c943fb43
More tail call removal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 21:14:24 +00:00
Jim Grosbach
1c8ab781d5
Skip dbg_value instructions when scanning instructions in register scavenging.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 20:18:30 +00:00
Dan Gohman
c87b40b1cd
Fix normalization and de-normalization of non-affine SCEVs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 19:16:34 +00:00
Jakob Stoklund Olesen
6de07178e1
Keep track of the call instructions whose clobber lists were skipped during fast
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register allocation.
Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.
This is necessary in case the calls clobber callee-saved registers (sic).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 18:08:29 +00:00
Dale Johannesen
8fa8e7fe95
More thoroughly disable tails calls by default.
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8060143, although this doesn't fix the real problem with tail call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 18:04:24 +00:00
Jim Grosbach
8af44b687b
Another fix to prevent debug info from affecting codegen. rdar://7797940
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105470 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 17:57:34 +00:00
Nate Begeman
92f98af9fb
Progress on generating BuiltinsARM.def, still some duplicates to work out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 07:11:25 +00:00
Nate Begeman
73cef3e9b1
BuiltinsARM.def emitter, still needs a substantial bit of tweaking to lighten the load on clang.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:26:15 +00:00
Jim Grosbach
958e4e1967
more dbg_value adjustments so debug info doesn't affect codegen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:23:30 +00:00
Mon P Wang
f62546ab04
Fixed a bug during widening where we would avoid legalizing a node. When we
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replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes. Since OpA has been processed, the new uses are
not examined again. The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:20:10 +00:00
Dale Johannesen
4314426fc0
Remove more tail calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:01:24 +00:00
Dale Johannesen
522a181d69
Remove a tail call, and move some CHECKs to the
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functions where they belong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 01:01:04 +00:00
Nate Begeman
a8979a0e7b
Mangle __builtin_neon_* names appropriately.
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Add skeleton of support for emitting the list of prototypes for BuiltinsARM.def
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:21:41 +00:00
Dan Gohman
b304ba94db
No need to special-case structs here; structs are first-class now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:18:06 +00:00
Jim Grosbach
d089a7ac70
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105441 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:15:00 +00:00
Dan Gohman
20af92e5b7
This test doesn't need the ssp attribute.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:14:48 +00:00
Bob Wilson
40cbe7d5d4
For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and
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VECTOR_SHUFFLEs to REG_SEQUENCE instructions. The standard ISD::BUILD_VECTOR
node corresponds closely to REG_SEQUENCE but I couldn't use it here because
its operands do not get legalized. That is pretty awful, but I guess it
makes sense for other targets. Instead, I have added an ARM-specific version
of BUILD_VECTOR that will have its operands properly legalized.
This fixes the rest of Radar 7872877.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105439 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:04:02 +00:00
Dale Johannesen
da8dd92c9f
Remove tail call. A tail call version will follow.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-04 00:03:37 +00:00
Bob Wilson
26bf8f9a1b
Add some missing checks in TwoAddressInstructionPass::CoalesceExtSubRegs.
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Check that all the instructions are in the same basic block, that the
EXTRACT_SUBREGs write to the same subregs that are being extracted, and that
the source and destination registers are in the same regclass. Some of
these constraints can be relaxed with a bit more work. Jakob suggested
that the loop that checks for subregs when NewSubIdx != 0 should use the
"nodbg" iterator, so I made that change here, too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 23:53:58 +00:00
Jim Grosbach
6ee358b4eb
Cleanup 80-column and trim trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 23:49:57 +00:00
Jim Grosbach
3de755bb40
Teach the ARM load-store optimizer to deal with dbg_value instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 22:41:15 +00:00
Dale Johannesen
127e5244a0
Remove tail call to preserve this test. A tail
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call version will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-03 21:57:48 +00:00