Commit Graph

109192 Commits

Author SHA1 Message Date
Matthias Braun
209f048663 LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFC
Filenames should match the name of the class they contain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321037 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 23:19:44 +00:00
Matthias Braun
4f43d6f3e0 X86/AArch64/ARM: Factor out common sincos_stret logic; NFCI
Note:
- X86ISelLowering: setLibcallName(SINCOS) was superfluous as
  InitLibcalls() already does it.
- ARMISelLowering: Setting libcallnames for sincos/sincosf seemed
  superfluous as in the darwin case it wouldn't be used while for all
  other cases InitLibcalls already does it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 23:19:42 +00:00
Matthias Braun
40c166819e AArch64/X86: Factor out common bzero logic; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 23:14:28 +00:00
Krzysztof Parzyszek
b01d49845c [Hexagon] Cache loads to select to avoid traversing mutating DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321034 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 23:13:27 +00:00
Craig Topper
fd4ed124f4 Revert part of r321026 "[X86] Don't use NOPL when the assembler is passed an empty CPU string." while I investigate how to fix an lld test failure.
Looks like lld also needs to pass a -mcpu in some of its tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321033 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 22:20:10 +00:00
Bob Haarman
b43be724f7 Fix buffer overrun in WindowsResourceCOFFWriter::writeSymbolTable()
Summary:
We were using sprintf(..., "$R06X", <some uint32_t>) to create strings
that are expected to be exactly length 8, but this results in longer
strings if the uint32_t is greater than 0xffffff. This change modifies
the behavior as follows:

 - Uses the loop counter instead of the data offset. This gives us
   sequential symbol names, avoiding collisions as much as possible.

 - Masks the value to 0xffffff to avoid generating names longer than 8
   bytes.

 - Uses formatv instead of sprintf.

Fixes PR35581.

Reviewers: ruiu, zturner

Reviewed By: ruiu

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41270

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321030 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 22:10:14 +00:00
Jessica Paquette
2bd867a1c6 [MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loop
River Riddle suggested to use std::any_of instead of the bool + loop thing on
r320229. This commit does that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321028 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 21:44:52 +00:00
Craig Topper
a0209c5a6c [X86] Don't use NOPL when the assembler is passed an empty CPU string. Update tests to force a CPU with NOPL
Empty string should be equivalent to "generic" which doesn't allow NOPL. Force tests to use specificy 'pentiumpro' to guarantee NOPL.

Fixes PR35686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321026 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 21:37:27 +00:00
Reid Kleckner
b198292af1 Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turbo
This reverts changes r320992, r320986, r320973, and r320970.

r320970 by itself breaks the test case, and the rest depend on it.

Test case will land soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321024 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 20:58:25 +00:00
Ivan A. Kosarev
7c48f0a768 [Analysis] Generate more precise TBAA tags when one access encloses the other
There are cases when two tags with different base types denote
accesses to the same direct or indirect member of a structure
type. Currently, merging of such tags results in a tag that
represents an access to an object that has the type of that
member. This patch changes this so that if one of the accesses
encloses the other, then the generic tag is the one of the
enclosed access.

Differential Revision: https://reviews.llvm.org/D39557


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321019 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 20:05:20 +00:00
Teresa Johnson
833c475471 [PGO] Fix handling of cold entry count for instrumented PGO
Summary:
In r277849, getEntryCount was changed to return None when the entry
count was 0, specifically for SamplePGO where it means no samples were
recorded. However, for instrumentation PGO a 0 entry count should be
returned directly, since it does mean that the function was completely
cold. Otherwise we end up treating these functions conservatively
in isFunctionEntryCold() and isColdBB().

Instead, for SamplePGO use -1 when there are no samples, and change
getEntryCount to return None when the value is -1.

Reviewers: danielcdh, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321018 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 20:02:43 +00:00
Dimitry Andric
d1fe0c4fdf Fix more inconsistent line endings. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321016 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 19:46:56 +00:00
Craig Topper
93e431a345 [X86] Minor formatting fix to getHostCPUFeatures. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321015 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 19:40:11 +00:00
Jessica Paquette
d4a00a6773 [MachineOutliner] Recommit r320229
LR was undefined entering outlined functions that contain calls. This made the
machine verifier unhappy when expensive checks were enabled. This fixes that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 19:33:21 +00:00
Benjamin Kramer
7db7ed3ddd [PPC] Also disable the pre-emit version of reg+reg to reg+imm transformation.
This has the same issue as the early pass disabled in r321010.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321013 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 19:21:56 +00:00
Paul Robinson
a6d921ec5b Recommit "[DWARFv5] Dump an MD5 checksum in the line-table header."
Adds missing support for DW_FORM_data16.

Update of r320852/r320886, fixing the unittest again, this time use a
raw char string for the test data.

Differential Revision: https://reviews.llvm.org/D41090

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321011 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 19:08:35 +00:00
Benjamin Kramer
0aa7e5ab50 [PPC] Disable reg+reg to reg+imm transformation.
It creates invalid instructions. PR35688.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321010 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:56:57 +00:00
Dimitry Andric
68e8e68dca Fix inconsistent line endings in HexagonVectorLoopCarriedReuse.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321009 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:56:00 +00:00
Krzysztof Parzyszek
65d3bc2034 [Hexagon] Higher versions of HVX imply presence of lower versions
The code in Hexagon_MC::completeHVXFeatures wasn't setting all HVX-
related features correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321008 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:51:57 +00:00
Ivan A. Kosarev
b10a40f71d [IR] Support the new TBAA metadata format in IR verifier
Differential Revision: https://reviews.llvm.org/D40438


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321007 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:46:44 +00:00
Dimitry Andric
826e27c6e0 Fix inconsistent line endings in ARCDisassembler.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321006 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:45:37 +00:00
Krzysztof Parzyszek
7364392054 i[Hexagon] ANY_EXTEND_VECTOR_INREG should be Custom, not Legal in r321004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:41:52 +00:00
Krzysztof Parzyszek
228589c54a [Hexagon] Generate HVX code for vector sign-, zero- and any-extends
Implement any-extend as zero-extend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:32:27 +00:00
Krzysztof Parzyszek
5966988685 [Hexagon] Prefer to widen HVX vectors instead of promoting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321002 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:21:01 +00:00
Matt Arsenault
1f57e5d6bc Removed unused DominanceFrontier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321001 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 18:01:13 +00:00
Xinliang David Li
03a6f4ae98 [PGO] add MST min edge selection heuristic to ensure non-zero entry count
Differential Revision: http://reviews.llvm.org/D41059


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320998 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 17:56:19 +00:00
Francis Visoiu Mistrih
65ad22d969 [YAML] Add support for non-printable characters
LLVM IR function names which disable mangling start with '\01'
(https://www.llvm.org/docs/LangRef.html#identifiers).

When an identifier like "\01@abc@" gets dumped to MIR, it is quoted, but
only with single quotes.

http://www.yaml.org/spec/1.2/spec.html#id2770814:

"The allowed character range explicitly excludes the C0 control block
allowed), the surrogate block #xD800-#xDFFF, #xFFFE, and #xFFFF."

http://www.yaml.org/spec/1.2/spec.html#id2776092:

"All non-printable characters must be escaped.
[...]
Note that escape sequences are only interpreted in double-quoted scalars."

This patch adds support for printing escaped non-printable characters
between double quotes if needed.

Should also fix PR31743.

Differential Revision: https://reviews.llvm.org/D41290

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320996 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 17:38:03 +00:00
Ivan A. Kosarev
d6be214351 [IR] Add MDBuilder helpers for the new TBAA metadata format
The new helpers are supposed to be used in clang to generate TBAA
information in the new format proposed in this thread:

http://lists.llvm.org/pipermail/llvm-dev/2017-November/118748.html

Differential Revision: https://reviews.llvm.org/D39956


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320993 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 16:49:39 +00:00
Sander de Smalen
f829832e3e [AArch64][SVE] Asm: Improve diagnostics further when +sve is not specified
Summary: Patch [4/4] in a series to add parsing of predicates and properly parse SVE ZIP1/ZIP2 instructions. This patch further improves diagnostic messages for when the SVE feature is not specified.

Reviewers: rengolin, fhahn, olista01, echristo, efriedma

Reviewed By: fhahn

Subscribers: sdardis, aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D40363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320992 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 16:48:53 +00:00
Simon Dardis
6b66227212 Reland "[mips] Fix the target specific instruction verifier"
Fix an off by one error in the bounds checking for 'dinsu' and update
the ranges in the test comments so that they are accurate.

This version has the correct commit message.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D41183


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320991 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 15:56:40 +00:00
Sean Fertile
b71c6a9b39 [Memcpy Loop Lowering] Remove the fixed int8 lowering.
Switch over to the lowering that uses target supplied operand types.

Differential Revision: https://reviews.llvm.org/D41201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320989 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 15:31:14 +00:00
Max Kazantsev
7a7c05d836 [LVI] Support for ashr in LVI
Enhance LVI to analyze the ‘ashr’ binary operation. This leverages the infrastructure in ConstantRange for the ashr operation.

Patch by Surya Kumari Jangala!

Differential Revision: https://reviews.llvm.org/D40886


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320983 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 14:23:30 +00:00
Diana Picus
1346bcc16e [ARM GlobalISel] Fix G_(UN)MERGE_VALUES handling after r319524
r319524 has made more G_MERGE_VALUES/G_UNMERGE_VALUES pairs legal than
are supported by the rest of the pipeline. Restrict that to only the
cases that we can currently handle: packing 32-bit values into 64-bit
ones, when we have hardware FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320980 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 13:22:28 +00:00
Max Kazantsev
5cecfe96eb [ConstantRange] Support for ashr in ConstantRange computation
Extend the ConstantRange implementation to compute the range of possible values resulting from an arithmetic right shift operation.
There will be a follow up patch to leverage this constant range infrastructure in LazyValueInfo.

Patch by Surya Kumari Jangala!

Differential Revision: https://reviews.llvm.org/D40881


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320976 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 13:01:32 +00:00
Simon Dardis
7a92215d16 Revert "[mips] Fix the target specific instruction verifier"
This reverts commit r320974. The commit message lacked the Differential Revison: line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320975 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 12:30:34 +00:00
Simon Dardis
bf081763f2 [mips] Fix the target specific instruction verifier
Fix an off by one error in the bounds checking for 'dinsu' and update
the ranges in the test comments so that they are accurate.

Reviewers: atanasyan

https://reviews.llvm.org/D41183


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320974 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 12:24:17 +00:00
Sander de Smalen
9d49216ade [AArch64][SVE] Asm: Add ZIP1/ZIP2 instructions (predicate/data vectors)
Summary: Patch [2/4] in a series to add parsing of predicates and properly parse SVE ZIP1/ZIP2 instructions.

Reviewers: rengolin, kristof.beyls, fhahn, mcrosier, evandro

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D40361

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320973 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 11:29:59 +00:00
Sander de Smalen
29dd081e8d [AArch64][SVE] Asm: Add SVE predicate register definitions and parsing support
Summary: Patch [1/4] in a series to add parsing of predicates and properly parse SVE ZIP1/ZIP2 instructions.

Reviewers: rengolin, kristof.beyls, fhahn, mcrosier, evandro, echristo, efriedma

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D40360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 11:26:34 +00:00
Eugene Leviant
0e72a729ed [ThinLTO] Remove unused code
This is a re-commit of r320464, after patch for gold plugin
was landed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320968 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 10:53:45 +00:00
Tim Northover
f66f36e9a4 AArch64: work around how Cyclone handles "movi.2d vD, #0".
For Cylone, the instruction "movi.2d vD, #0" is executed incorrectly in some rare
circumstances. Work around the issue conservatively by avoiding the instruction entirely.

This patch changes CodeGen so that problematic instructions are never
generated, and the AsmParser so that an equivalent instruction is used (with a
warning).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320965 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 10:36:00 +00:00
Igor Laevsky
b887495d4b [TargetLibraryInfo] Discard library functions with incorrectly sized integers
Differential Revision: https://reviews.llvm.org/D41184



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320964 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 10:31:58 +00:00
Sam Parker
72b2ece0db [DAGCombine] Move AND nodes to multiple load leaves
Search from AND nodes to find whether they can be propagated back to
loads, so that the AND and load can be combined into a narrow load.
We search through OR, XOR and other AND nodes and all bar one of the
leaves are required to be loads or constants. The exception node then
needs to be masked off meaning that the 'and' isn't removed, but the
loads(s) are narrowed still.

Differential Revision: https://reviews.llvm.org/D41177


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320962 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 10:04:27 +00:00
Clement Courbet
805454d207 [NFC][CodeGen][ExpandMemCmp] Fix documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320960 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 07:32:48 +00:00
Hiroshi Inoue
f8bf5c2a17 [SROA] Disable non-whole-alloca splits by default
This patch introduce a switch to control splitting of non-whole-alloca slices with default off.
The switch will be default on again after fixing an issue reported in PR35657.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320958 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 06:47:37 +00:00
Craig Topper
a9e5853a21 [X86] Fix mistake that I made when splitting up the setOperationAction calls recently.
The block I moved things that need BWI and 512-bit or VLX is incorrectly qualified with just hasBWI || hasVLX. Here I've qualified it with hasBWI && (hasAVX512 || hasVLX) where the hasAVX512 will be replaced with allowing 512-bit vectors in an upcoming patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320957 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 04:50:05 +00:00
Serguei Katkov
5f348c6a0c [CGP] Fix the handling select inst in complex addressing mode
When we put the value in select placeholder we must pass
the value through simplification tracker due to the value might
be already simplified and erased.

This is a fix for PR35658.

Reviewers: john.brawn, uabelho
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41251


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320956 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-18 04:25:07 +00:00
Bjorn Steinbrink
53f8289df4 Re-commit "Properly handle multi-element and dynamically sized allocas in getPointerDereferenceableBytes()""
llvm-clang-x86_64-expensive-checks-win is still broken, so the failure
seems unrelated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320953 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-17 21:20:16 +00:00
Craig Topper
aa22588b15 [X86] Make the code that creates fmaddsub from build_vector of extracts and inserts functional and add tests.
Summary:
We had no tests for this and we couldn't do the optimization because of a bad use count check. We need to know how many non-undef pieces of the build vector were filled in and ensure our use count is equal to that. But on the shuffle combine version we need the use count to be 2.

The missing coverage was noticed during the review of D40335.

Reviewers: RKSimon, zvi, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320950 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-17 18:23:45 +00:00
Sam Clegg
6e6de69a0f [WebAssembly] Export some more info on wasm funtions
Summary:
These fields are useful for lld's gc-sections support

Also remove an unused field.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish

Differential Revision: https://reviews.llvm.org/D41320

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320946 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-17 17:50:07 +00:00
Bjorn Steinbrink
ce542fd0ce Revert "Properly handle multi-element and dynamically sized allocas in getPointerDereferenceableBytes()"
This reverts commit 217067d517.

Fails on llvm-clang-x86_64-expensive-checks-win

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320945 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-17 15:16:58 +00:00