Commit Graph

157158 Commits

Author SHA1 Message Date
Daniel Sanders
355825a81e Add backend name to Target to enable runtime info to be fed back into TableGen
Summary:
Make it possible to feed runtime information back to tablegen to enable
profile-guided tablegen-eration, detection of untested tablegen definitions, etc.

Being a cross-compiler by nature, LLVM will potentially collect data for multiple
architectures (e.g. when running 'ninja check'). We therefore need a way for
TableGen to figure out what data applies to the backend it is generating at the
time. This patch achieves that by including the name of the 'def X : Target ...'
for the backend in the TargetRegistry.

Reviewers: qcolombet

Reviewed By: qcolombet

Subscribers: jholewinski, arsenm, jyknight, aditya_nandakumar, sdardis, nemanjai, ab, nhaehnle, t.p.northover, javed.absar, qcolombet, llvm-commits, fedor.sergeev

Differential Revision: https://reviews.llvm.org/D39742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318352 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 23:55:44 +00:00
Evandro Menezes
c39780185f [AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of FP stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318351 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 23:49:58 +00:00
Aditya Nandakumar
e6aaf10a30 [GISel][NFC]: Move getOpcodeDef from the LegalizationArtifactCombiner into GlobalISel/Utils for use elsewhere
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318350 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 23:45:04 +00:00
Sanjay Patel
512f338d01 [InstCombine] add sub narrowing tests; NFC
This might be the root cause of PR35295:
https://bugs.llvm.org/show_bug.cgi?id=35295


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318342 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 22:19:55 +00:00
Matt Arsenault
710e9b3dae AMDGPU: Replace i64 add/sub lowering
Use VOP3 add/addc like usual.

This has some tradeoffs. Inline immediates fold
a little better, but other constants are worse off.
SIShrinkInstructions could be made smarter to handle
these cases.

This allows us to avoid selecting scalar adds where we
need to track the carry in scc and replace its users.
This makes it easier to use the carryless VALU adds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318340 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 21:51:43 +00:00
Dan Gohman
9b78b26b27 [WebAssembly] Update cfg-stackify.ll to remove the workaround added in r318288.
Remove -switch-peel-threshold=100 and update the expected results in test10
in cfg-stackify.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 21:38:33 +00:00
Evandro Menezes
6bce9f6182 [AArch64] Refactor the loads and stores optimizer
Move remaining inline matching of instructions of some optimizations into
separate functions, like in the other optimizations.  Otherwise, NFC.

Differential revision: https://reviews.llvm.org/D40090

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318335 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 21:06:22 +00:00
Rafael Espindola
5feaa63a70 Simplify file handling in dsymutil.
This moves the file handling out of DwarfLinker.cpp.

This fixes what is at least an oddity if not a bug. DwarfLinker.cpp
was using ToolOutputFile, which uses RemoveFileOnSignal. The issue is
that dsymutil.cpp uses that too. It is now clear from the interface
that only dsymutil.cpp is responsible for creating and deleting files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318334 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 20:55:53 +00:00
Craig Topper
9723ed5d6f [X86] Add some explanatory comments to the ProcessorFeatures enum in Host.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318331 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 20:42:49 +00:00
Craig Topper
d3affce9f3 [X86] Add a return to the end of a switch to prevent an accidental fallthrough in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318330 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 20:42:47 +00:00
Jake Ehrlich
7198b60643 [llvm-objcopy] Change -O binary to respect section removal and behave like GNU objcopy
The original -O binary implementation just copied segment data from the
object and dumped it into a file. This doesn't take into account any
operations performed on objects such as section removal. GNU objcopy has
some specific behavior that we'd also like to respect. For instance
using -O binary and -j <some_section> will dump <some_section> to a
file. This change implements GNU objcopy style -O binary to as close of
an approximation as I can determine.

Differential Revision: https://reviews.llvm.org/D39713

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318324 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 19:13:31 +00:00
Sanjay Patel
c8be5de456 [InstCombine] trunc (binop X, C) --> binop (trunc X, C')
Note that one-use and shouldChangeType() are checked ahead of the switch.

Without the narrowing folds, we can produce inferior vector code as shown in PR35299:
https://bugs.llvm.org/show_bug.cgi?id=35299



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318323 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 19:12:01 +00:00
Rafael Espindola
58a331a982 Use TempFile in lto caching.
This requires a small change to TempFile: allowing a discard after a
failed keep.

With this the cache now handles signals and reuses a fd instead of
reopening the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318322 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 19:09:22 +00:00
Sean Fertile
0fe98240bd [PowerPC] Implement mayBeEmittedAsTailCall for PPC
Implements TargetLowering callback 'mayBeEmittedAsTailCall' that enables
CodeGenPrepare to duplicate returns when they might enable a tail-call.

Differential Revision: https://reviews.llvm.org/D39777

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318321 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 18:58:27 +00:00
Reid Kleckner
869a0096cd [InstCombine] Salvage debug info during initial DCE
InstCombine salvages debug info for every instruction it erases from its
worklist, but it wasn't doing it during its initial DCE when populating
its worklist. This fixes that.

This should help improve availability of 'this' in optimized debug info
when casts are necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 18:51:12 +00:00
Sanjay Patel
82de10056f [InstCombine] add tests for missing trunc folds; NFC
As noted in PR35299:
https://bugs.llvm.org/show_bug.cgi?id=35299
...this is likely the root cause for a mis-vectorization transform.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318319 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 18:09:43 +00:00
Vedant Kumar
5e1ec5bede [docs] Mention opt -metarenamer in the bugpoint docs
Thanks to arsenm and davide for the suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318318 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 18:05:19 +00:00
Evandro Menezes
9c19935acc [AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of loads and stores using the pre or post indexed
addressing modes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318312 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 17:39:37 +00:00
Simon Pilgrim
f640c8e4d8 [X86] Add CBW/CDQ/CDQE/CQO/CWD/CWDE to WriteALU schedule class
Some CPUs are already overriding these sign extension instructions but we should be able to use the WriteALU schedule class by default.

Differential Revision: https://reviews.llvm.org/D39899

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318308 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 17:11:24 +00:00
Adam Nemet
e074ad4a0c [SLP] Added more missed optimization remarks
Summary:
Added more remarks to SLP pass, in particular "missed" optimization remarks.
Also proposed several tests for new functionality.

Patch by Vladimir Miloserdov!

For reference you may look at: https://reviews.llvm.org/rL302811

Reviewers: anemet, fhahn

Reviewed By: anemet

Subscribers: javed.absar, lattner, petecoup, yakush, llvm-commits

Differential Revision: https://reviews.llvm.org/D38367

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318307 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 17:04:53 +00:00
Sean Fertile
73e1b04819 [PowerPC] Split out the tailcall calling convention checks. NFC.
Move the calling convention checks for tail-call eligibility for the 64-bit
SysV ABI into a separate function. This is so that it can be shared with
'mayBeEmittedAsTailCall' in a subsequent change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318305 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 16:53:41 +00:00
Sanjay Patel
d68d614a5d [PassManager, SimplifyCFG] add test for PR34603 / D38566; NFC
This is a recommit of r316908 which was reverted by r317444.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318300 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 16:37:30 +00:00
Sanjay Patel
dda43d9dce [(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
This is a recommit of r316869 which was speculatively reverted with r317444 and 
subsequently shown to not be the cause of PR35210. That crash should be fixed
after r318237.

Original commit message:

The old PM sets the options of what used to be known as "latesimplifycfg" on the
instantiation after the vectorizers have run, so that's what we'redoing here.

FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not
set the "late" options. I'm not sure if that's intentional or not.

Differential Revision: https://reviews.llvm.org/D39407


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318299 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 16:33:11 +00:00
Sanjay Patel
b7ba7dffa6 [Reassociate] simplify code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318298 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 16:19:17 +00:00
Sander de Smalen
7e8bb4787f [AArch64][SVE] Asm: Report SVE parsing diagnostics only once
Summary:
Prevent an issue where a diagnostic is reported multiple times by bailing out with a ParseFail if an invalid SVE register element qualifier/suffix is specified, for example:

 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
                 ^
 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
 
 ...
 
 <stdin>:10:18: error: invalid sve vector kind qualifier
 add z20.h, z2.h, z31.x
                 ^


Reviewers: fhahn, rengolin

Reviewed By: rengolin

Subscribers: aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D39894

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318297 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 15:44:43 +00:00
Petar Jovanovic
9c8398490b [mips] Improve genConstMult() to work with arbitrary precision
APInt is now used instead of uint64_t in function genConstMult() allowing
multiplication optimizations with constants of arbitrary length.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D38130


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318296 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 15:24:04 +00:00
Igor Laevsky
b3380b5cf4 [llvm-opt-fuzzer] Add opt fuzzer to the test-depends list.
This should help with the buildbot failures after rL318293.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318295 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 15:07:37 +00:00
Igor Laevsky
9f1a57ce79 [llvm-opt-fuzzer] Only run tests for the x86 target.
This fixes build bot failures after rL318293.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318294 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 13:35:42 +00:00
Igor Laevsky
7de5f26dcd [llvm-opt-fuzzer] NFC. Add sanity tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318293 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 12:36:57 +00:00
Momchil Velikov
29a99e3278 [ARM] Split Arm jump table branch into i12 and rs suffixed versions
This is a refactoring/cleanup of Arm `addrmode2` operand class. The patch
removes it completely.

Differential Revision: https://reviews.llvm.org/D39832



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318291 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 12:02:55 +00:00
Jonas Devlieghere
4dac35da72 [DebugInfo] Fix potential CU mismatch for SubprogramScopeDIEs.
In constructAbstractSubprogramScopeDIE there can be a potential mismatch
between `this` and the CU of ContextDIE when a scope is shared between
two DISubprograms belonging to a different CU. In that case, `this` is
the CU that was specified in the IR, but the CU of ContextDIE is that of
the first subprogram that was emitted. This patch fixes the mismatch by
looking up the CU of ContextDIE, and switching to use that.

This fixes PR35212 (https://bugs.llvm.org/show_bug.cgi?id=35212)

Patch by Philip Craig!

Differential revision: https://reviews.llvm.org/D39981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318289 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 10:57:05 +00:00
Ilya Biryukov
571bd4540f Workaround CodeGen/WebAssembly/cfg-stackify.ll failure after r318202
By disabling the introduced optimization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318288 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 10:50:43 +00:00
Mikael Holmen
c14b5c3b1e [Lint] Don't warn about passing alloca'd value to tail call if using byval
Summary:
This fixes PR35241.

When using byval, the data is effectively copied as part of the call
anyway, so the pointer returned by the alloca will not be leaked to the
callee and thus there is no reason to issue a warning.

Reviewers: rnk

Reviewed By: rnk

Subscribers: Ka-Ka, llvm-commits

Differential Revision: https://reviews.llvm.org/D40009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318279 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:46:48 +00:00
Craig Topper
8aebe5139f [X86] Redefine the 128-bit version of VPGATHERQD and VGATHERQPS to use a VK2 mask instead of a VK4 mask.
This allows us to remove extra extend creation during lowering and more accurately reflects the semantics of the instruction.

While there add an extra output VT to X86 masked gather node to better match the isel pattern predicate. Currently we're exploiting the fact that the isel table doesn't count how many output results a node actually has if the result type of any can be inferred from the first result and the type constraints defined in tablegen. I think we might ultimately want to lower all MGATHER/MSCATTER to an X86ISD node with the extra mask result and stop relying on this hole in the isel checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318278 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:46:43 +00:00
NAKAMURA Takumi
adf7d53473 GISelWorkList.h: Fix -fmodules build in rL318210.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318275 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 07:34:35 +00:00
NAKAMURA Takumi
45ed11f7a6 Fix llvm/test/Transforms/LoopRotate/pr35210.ll in rL318237, it uses debug options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318273 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:46:58 +00:00
Fangrui Song
0b5d88f3e0 NFC Remove default argument of DataLayout::getPointerABIAlignment
Differential Revision: https://reviews.llvm.org/D40005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:17:32 +00:00
Craig Topper
c2f0e01cab [X86] Add getHostCPUName support for the Gemini Lake model number which also uses Goldmont.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318271 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:02:43 +00:00
Craig Topper
c2076189ef [X86] Add getHostCPUName support for cannonlake.
This adds an explicit model number check and fallback path to the unknown family 6 detection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318270 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 06:02:42 +00:00
Craig Topper
0612ed0350 [InstCombine] Simplify binops that are only used by a select and are fed by a select with the same condition.
Summary:
This patch optimizes a binop sandwiched between 2 selects with the same condition. Since we know its only used by the select we can propagate the appropriate input value from the earlier select.

As I'm writing this I realize I may need to avoid doing this for division in case the select was protecting a divide by zero?

Reviewers: spatel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318267 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 05:23:02 +00:00
Hiroshi Inoue
cd69cc5db2 [PowerPC] fix up in redundant compare elimination
This patch fixes a potential problem in my previous commit (https://reviews.llvm.org/rL312514) by introducing an additional check.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 04:23:26 +00:00
Vedant Kumar
4aef6b8206 [docs] Document a way to simplify names in bugpoint output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318257 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 02:58:45 +00:00
Matt Arsenault
3f38dad8a7 AMDGPU: Add separate definitions for DS insts without m0 use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318246 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 01:34:06 +00:00
Craig Topper
f004f4147f [X86] Correct the spelling of pentiumpro in X86TargetParser.def
Thanks to Erich Keane for spotting this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318243 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 01:01:50 +00:00
Matt Arsenault
bc9fb908bc AMDGPU: Don't use MUBUF vaddr if address may overflow
Effectively revert r263964. Before we would not
allow this if vaddr was not known to be positive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318240 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:45:43 +00:00
Hans Wennborg
2c21c88a19 Revert r318193 "[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops."
It crashes building sqlite; see reply on the llvm-commits thread.

> [SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.
>
>         Patch tries to improve vectorization of the following code:
>
>         void add1(int * __restrict dst, const int * __restrict src) {
>           *dst++ = *src++;
>           *dst++ = *src++ + 1;
>           *dst++ = *src++ + 2;
>           *dst++ = *src++ + 3;
>         }
>         Allows to vectorize even if the very first operation is not a binary add, but just a load.
>
>         Fixed issues related to previous commit.
>
>         Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev
>
>         Reviewed By: ABataev, RKSimon
>
>         Subscribers: llvm-commits, RKSimon
>
>         Differential Revision: https://reviews.llvm.org/D28907

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318239 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:38:13 +00:00
Mitch Phillips
592aa29380 [cfi-verify] Validate there are no register clobbers between CFI-check and instruction execution.
Summary:
This patch adds another failure mode for `validateCFIProtection(..)`, wherein any register that affects the indirect control flow instruction is clobbered to between the CFI-check and the instruction's execution.

Also includes a modification to make MCInstrDesc::hasDefOfPhysReg public.

Reviewers: vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, pcc, kcc

Differential Revision: https://reviews.llvm.org/D39820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:35:26 +00:00
Craig Topper
7e9abd2530 [LoopRotate] processLoop should return true even if it just simplified the loop latch without making any other changes
Simplifying a loop latch changes the IR and we need to make sure the pass manager knows to invalidate analysis passes if that happened.

PR35210 discovered a case where we failed to invalidate the post dominator tree after this simplification because we no changes other than simplifying the loop latch.

Fixes PR35210.

Differential Revision: https://reviews.llvm.org/D40035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318237 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:22:42 +00:00
Evgeniy Stepanov
eace9e3d8d [asan] Prevent rematerialization of &__asan_shadow.
Summary:
In the mode when ASan shadow base is computed as the address of an
external global (__asan_shadow, currently on android/arm32 only),
regalloc prefers to rematerialize this value to save register spills.
Even in -Os. On arm32 it is rather expensive (2 loads + 1 constant
pool entry).

This changes adds an inline asm in the function prologue to suppress
this behavior. It reduces AsanTest binary size by 7%.

Reviewers: pcc, vitalybuka

Subscribers: aemerson, kristof.beyls, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318235 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-15 00:11:51 +00:00
Vedant Kumar
6183484a21 [PGO] Bump the indexed profile format version
Differential Revision: https://reviews.llvm.org/D39447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-14 23:56:48 +00:00