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280dfad489
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3770 Commits

Author SHA1 Message Date
Jim Grosbach
280dfad489 ARM VLD parsing and encoding. 
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-21 18:54:25 +00:00
Duncan Sands
58fba239e4 Ensure timestamps are not embedded into files when doing a release build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-21 09:47:14 +00:00
Bill Wendling
b9ad624fcd Modify the script to output the regressions and passes into categories. My Python-fu could use some improving... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142643 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-21 06:58:01 +00:00
Bill Wendling
3df9f541a0 Check for divide by zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142640 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-21 06:26:01 +00:00
Duncan Sands
19595dc4d0 Also compare the built dragonegg objects between phases 2 and 3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142608 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-20 20:14:18 +00:00
Duncan Sands
fbc0dec7b4 Reset the system compiler each time we start a new flavour. Otherwise 
the last compiler built for the previous flavour is used for the next,
for example the Debug clang compiler was being used for the initial build
of the Release LLVM.  Flavors should be independent of each other.  This
especially matters if the compiler built for the previous flavour doesn't
actually work!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142607 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-20 20:10:58 +00:00
Duncan Sands
c1aef0884c Add support for testing dragonegg. This is disabled by default. 
In fact this commit is not intended to change anything unless you
use one of the new command line flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142577 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-20 11:13:04 +00:00
Bill Wendling
3a8eaa736f Revamp the script to handle the 'TEST=simple' output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-20 00:45:46 +00:00
Bill Wendling
250c6801e4 Duncan pointed out that sometimes CC and CXX are used to specify the compiler. Also that the configure script takes care of finding an appropriate compiler if one's not specified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142489 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-19 09:47:00 +00:00
Bill Wendling
495069e4df Use bash instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-19 09:25:49 +00:00
Bill Wendling
783993e795 Make changes so that this runs on FreeBSD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-19 08:42:07 +00:00
Joe Abbey
fffc0fe42c Adding dependencies to allow -DBUILD_SHARED_LIBS=true to complete. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-19 00:13:13 +00:00
Jim Grosbach
862019c37f ARM VTBL (one register) assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142441 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 23:02:30 +00:00
Bill Wendling
630243a8c2 Don't exit just because some early commands fail. Use the -k flag when running the checks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142369 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 17:27:12 +00:00
Jim Grosbach
f2f5bc60f6 ARM assembly parsing and encoding for VMOV.i64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142356 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 16:18:11 +00:00
Jim Grosbach
6248a546f2 ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 00:22:00 +00:00
Jim Grosbach
ea46110f57 ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142303 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 23:09:09 +00:00
Jim Grosbach
0e387b2877 ARM NEON "vmov.i8" immediate assembly parsing and encoding. 
NEON immediates are "interesting". Start of the work to handle parsing them
in an 'as' compatible manner. Getting the matcher to play nicely with
these and the floating point immediates from VFP is an extra fun wrinkle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 22:26:03 +00:00
Bill Wendling
540d5b7406 Forgot to add the project name to the 'svn ls' command. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 21:45:07 +00:00
Bill Wendling
10f3210477 Add message to svn mkdir command. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142280 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 21:42:29 +00:00
Owen Anderson
684dfcf724 Fix unused variable warning in the rare circumstance that we have no feature-dependent instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 16:56:47 +00:00
Benjamin Kramer
af482cf301 Pick low-hanging MatchEntry shrinkage fruit. 
Shaves 200k off Release-Asserts clang binaries on i386.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142191 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 16:18:09 +00:00
Bill Wendling
41adc5fb8b Don't download and compile compiler-rt, libcxx, and libcxxabi by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142185 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 08:41:20 +00:00
Bill Wendling
a854f5d6f9 Update to disable asserts. Build a phase 3 compiler, and compare phase 2 files against phase 3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142173 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 04:46:54 +00:00
Bill Wendling
1416dc29d8 Overhaul the 'test-release' script. 
This removes support for building llvm-gcc. It will eventually add support for
building other projects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142165 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 22:44:08 +00:00
Bill Wendling
eeb58a7e6b Update the tree before applying patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142155 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 20:59:25 +00:00
Craig Topper
ee62e4f6d1 Add X86 PEXTR and PDEP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142141 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 16:50:08 +00:00
Craig Topper
b53fa8bf19 Add X86 BZHI instruction as well as BMI2 feature detection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:55:05 +00:00
Craig Topper
dc479c4a89 Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:05:40 +00:00
Chris Lattner
3f2d5f60b3 Make SMDiagnostic a little more sane. Instead of passing around note/warning/error as a 
string, pass it around as an enum.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 05:43:57 +00:00
Chris Lattner
d8b7aa2613 Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance 
the X86 asmparser to produce ranges in the one case that was annoying me, for example:

test.s:10:15: error: invalid operand for instruction
movl 0(%rax), 0(%edx)
              ^~~~~~~

It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use 
ranges where appropriate if someone is interested.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 04:47:35 +00:00
Craig Topper
17730847d5 Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 03:51:13 +00:00
Bill Wendling
9a6d61554f Add a helper script to create branches and tag release candidates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142098 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 02:03:18 +00:00
Bill Wendling
f4a4e3ae74 Add a script that helps merge changes into a release branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142097 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 01:54:03 +00:00
Craig Topper
566f233ba6 Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 20:46:47 +00:00
David Greene
bc5c49b6c7 Fix threads/jobs Calculation 
Pass the correct jobs and threads information to the builder.
We were underutilizing the number of jobs and threads specified
by the user.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141977 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 19:12:37 +00:00
David Greene
8e20b9456e Add Helpful Messages 
Bit just a bit more verbose about what's going on.  Print options
to make to aid debugging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141976 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 19:12:35 +00:00
David Greene
cdc3fbc61b Add Option to Skip Install 
Add a --no-install option to skip installing components.  This
speeds up the develop/test cycle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141975 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 19:12:34 +00:00
David Greene
d17f81343c Add Option to Skip gcc Build 
And a --no-gcc option to skip dragonegg and gcc builds.
This greatly speeds up the develop/test cycle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 19:12:33 +00:00
Craig Topper
54a11176f6 Add X86 ANDN instruction. Including instruction selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 07:06:56 +00:00
Jakob Stoklund Olesen
ccbe603869 Ban rematerializable instructions with side effects. 
TableGen infers unmodeled side effects on instructions without a
pattern.  Fix some instruction definitions where that was overlooked.

Also raise an error if a rematerializable instruction has unmodeled side
effects. That doen't make any sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-14 01:00:49 +00:00
Jim Grosbach
9b8f2a0b36 ARM parsing and encoding for the <option> form of LDC/STC instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-12 17:34:41 +00:00
Eli Friedman
830378f662 Remove extra semicolon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141699 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 19:53:40 +00:00
Craig Topper
29480fd798 Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141642 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 04:34:23 +00:00
Jakob Stoklund Olesen
819a2abc72 Emit full ED initializers even for pseudo-instructions. 
This should unbreak the picky buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-10 20:15:49 +00:00
Jakob Stoklund Olesen
a0ed0c0fcd Insert dummy ED table entries for pseudo-instructions. 
The table is indexed by opcode, so simply removing pseudo-instructions
creates a wrong mapping from opcode to table entry.

Add a test case for xorps which has a very high opcode that exposes this
problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141562 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-10 18:30:16 +00:00
Jim Grosbach
460a90540b ARM NEON assembly parsing and encoding for VDUP(scalar). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-07 23:56:00 +00:00
David Greene
a1b1b79be1 Remove Multidefs 
Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-07 18:25:05 +00:00
Craig Topper
25f6dfd108 Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-07 05:35:38 +00:00
Peter Collingbourne
6d1409dcc5 Remove the Clang tblgen backends from LLVM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-06 13:21:42 +00:00