Jim Laskey
38a409c7ae
Pretty print large struct constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26400 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 10:33:53 +00:00
Jim Laskey
dae29989cf
Removed dependency on how operands are printed (want multi-line.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26399 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 10:29:04 +00:00
Chris Lattner
3e88a4d700
Merge two almost-identical pieces of code.
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Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand. This lets us fold this:
int %test23(int %a) {
%tmp.1 = and int %a, 1
%tmp.2 = seteq int %tmp.1, 0
%tmp.3 = cast bool %tmp.2 to int ;; xor tmp1, 1
ret int %tmp.3
}
into: xor (and a, 1), 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26396 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 02:38:23 +00:00
Chris Lattner
26ab9a9218
Fold (A^B) == A -> B == 0
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and (A-B) == A -> B == 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26394 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 01:44:11 +00:00
Chris Lattner
a6bc5a4d21
Implement bit propagation through sub nodes, this (re)implements
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PowerPC/div-2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 01:00:42 +00:00
Chris Lattner
2d2536c9d7
remove some completed notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:39:31 +00:00
Chris Lattner
81cd35586f
Check RHS simplification before LHS simplification to avoid infinitely looping
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on PowerPC/small-arguments.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:36:27 +00:00
Chris Lattner
5f0c658aa4
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
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simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:22:28 +00:00
Chris Lattner
ec665151b8
Add a bunch of missed cases. Perhaps the most significant of which is that
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assertzext produces zero bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 23:36:02 +00:00
Chris Lattner
02bd1b3e94
Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements
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InstCombine/or.ll:test23.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26385 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 19:57:54 +00:00
Jim Laskey
c13a72c329
Reverting. Didn't realize some developers were embedding constants in their
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target assembler code gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26383 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 10:16:05 +00:00
Evan Cheng
140a4c4868
ConstantPoolIndex is now the displacement portion of the address (rather
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than base).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 09:12:34 +00:00
Evan Cheng
38b7327ec0
Print ConstantPoolSDNode offset field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 08:36:57 +00:00
Evan Cheng
a09bd8190c
Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP
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and 2005-05-12-Int64ToFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 08:28:12 +00:00
Jim Laskey
a3f332bdc3
Format large struct constants for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26379 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 12:27:03 +00:00
Evan Cheng
51a9ed9b41
* Cleaned up addressing mode matching code.
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* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
they need to be matched before LEA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:09:08 +00:00
Evan Cheng
53f280a30e
Updates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26375 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:04:07 +00:00
Evan Cheng
71fb834b50
* Allow mul, shl nodes to be codegen'd as LEA (if appropriate).
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* Add patterns to handle GlobalAddress, ConstantPool, etc.
MOV32ri to materialize these nodes in registers.
ADD32ri to handle %reg + GA, etc.
MOV32mi to handle store GA, etc. to memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 10:02:21 +00:00
Evan Cheng
c4ee50c6b9
ConstantPoolIndex is now the displacement field of addressing mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:56:50 +00:00
Evan Cheng
bbbb2fbbde
Added a common about the need for X86ISD::Wrapper.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26372 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:55:19 +00:00
Evan Cheng
404cb4f9fa
Added an offset field to ConstantPoolSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 09:54:52 +00:00
Chris Lattner
28bad08411
Fix a bug that Evan exposed with some changes he's making, and that was
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exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).
When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:17:31 +00:00
Chris Lattner
47cb7173ea
Remove debugging printout :)
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Add a minor compile time win, no codegen change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:03:40 +00:00
Chris Lattner
540fec6b38
Refactor some code from being inline to being out in a new class with methods.
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This gets rid of two gotos, which is always nice, and also adds some comments.
No functionality change, this is just a refactor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 01:51:33 +00:00
Evan Cheng
cb4a38e75d
Fix an obvious bug exposed when we are doing
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ADD X, 4
==>
MOV32ri $X+4, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 01:37:02 +00:00
Chris Lattner
2c003e26e5
Add memory printing support for PPC. Input memory operands now work with
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inline asms! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26365 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 20:27:40 +00:00
Chris Lattner
dd26033002
Use the PrintAsmMemoryOperand to print addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 20:21:58 +00:00
Chris Lattner
daf6bc6347
Pass all the flags to the asm printer, not just the # operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 19:50:58 +00:00
Chris Lattner
fd6d282a71
rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.
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Add support for addressing modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 19:18:20 +00:00
Chris Lattner
ed18b6896e
Refactor operand adding out to a new AddOperand method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 18:54:03 +00:00
Chris Lattner
97f37a439c
Fix a problem that Nate noticed that boils down to an over conservative check
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in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:
LBB1_1: ; no_exit
add r6, r2, r3
subf r3, r2, r3
cmpwi cr0, r2, 0
addi r7, r5, 4
lwz r2, 0(r5)
addi r4, r4, 1
blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
mr r3, r6
LBB1_4: ; no_exit
cmpwi cr0, r4, 16
mr r5, r7
bne cr0, LBB1_1 ; no_exit
into this instead:
LBB1_1: ; no_exit
srawi r6, r2, 31
add r2, r2, r6
xor r6, r2, r6
addi r7, r5, 4
lwz r2, 0(r5)
addi r4, r4, 1
add r3, r3, r6
cmpwi cr0, r4, 16
mr r5, r7
bne cr0, LBB1_1 ; no_exit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26356 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 18:05:58 +00:00
Jim Laskey
6990600f93
Add pointer and reference types. Added short-term code to ignore NULL types
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(to allow llvm-gcc4 to build.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26355 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 16:46:40 +00:00
Jeff Cohen
7e88103cde
Get VC++ building again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 02:52:40 +00:00
Chris Lattner
0e43f2ba11
Implement (most of) selection of inline asm memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 02:13:54 +00:00
Chris Lattner
e5d8861126
Implement selection of inline asm memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 02:13:12 +00:00
Chris Lattner
87bc3bd121
Lower C_Memory operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:11:24 +00:00
Chris Lattner
2b7401e28e
Recognize memory operand codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:10:46 +00:00
Chris Lattner
fe3db46fe0
Parse the %*# constraint modifiers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26341 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 23:36:53 +00:00
Jim Laskey
434b40b42f
Added basic support for typedefs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 22:37:30 +00:00
Evan Cheng
d0839f3071
PPC JIT relocation model should be DynamicNoPIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26338 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 22:18:07 +00:00
Evan Cheng
020d2e8e7a
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
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and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
mentioned leaf nodes. Do not mutate and nodes and do not record the
selection in CodeGenMap. These nodes should be safe to duplicate. This is
a performance win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:41:18 +00:00
Chris Lattner
9f6637db10
Fix an endianness problem on big-endian targets with expanded operands
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to inline asms. Mark some methods const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:06:57 +00:00
Chris Lattner
e3f01570c1
Implement the PPC inline asm "L" modifier. This allows us to compile:
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long long test(long long X) {
__asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
return X;
}
to:
foo r2 r3 r2 r3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 19:31:10 +00:00
Chris Lattner
c3a9f8d31c
Record all of the expanded registers in the DAG and machine instr, fixing
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several bugs in inline asm expanded operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 19:21:04 +00:00
Jim Laskey
f4afdd9f41
DwarfWriter reading basic type information from llvm-gcc4 code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 16:58:18 +00:00
Chris Lattner
ffab42263a
Code cleanups, no functionality change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 06:44:17 +00:00
Chris Lattner
e650a6b3f4
"." isn't enough to get a private label on linux, use ".L".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26327 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 05:25:02 +00:00
Chris Lattner
205065ae0c
add a small and simple case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 05:17:43 +00:00
Evan Cheng
3032410f9b
A couple of new entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26325 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:50:21 +00:00
Evan Cheng
a0ea0539e3
PIC related bug fixes.
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1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:43:52 +00:00