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178 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
0ad37f781f [Hexagon] Fix incorrect generation of S4_subi_asl_ri 
Patch by Jyotsna Verma.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279267 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-19 16:35:05 +00:00
Krzysztof Parzyszek
66e19711ac [Hexagon] Add missing pattern for C4_cmplte 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279265 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-19 16:11:33 +00:00
Krzysztof Parzyszek
1b1291fbbb [Hexagon] Prefer _io over _rr for 64-bit store with constant offset 
Identify patterns where the address is aligned to an 8-byte boundary,
but both the base address and the constant offset are both proper
multiples of 4. In such cases, extract Base+4 into a separate instruc-
tion, and use S2_storerd_io, instead of using S4_storerd_rr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277497 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-08-02 18:50:05 +00:00
Krzysztof Parzyszek
bd8bfbd4cb [Hexagon] Update instruction itineraries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275578 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-15 16:58:34 +00:00
Krzysztof Parzyszek
76ebffffd3 [Hexagon] Fixes/changes to instruction selection 
- Add patterns for rr/abs addressing modes.
- Set addrMode to PostInc where necessary.
- Misc fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275574 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-15 16:29:02 +00:00
Krzysztof Parzyszek
733cec8f05 [Hexagon] Improve patterns with stack-based addressing 
- Treat bitwise OR with a frame index as an ADD wherever possible, fold it
  into addressing mode.
- Extend patterns for memops to allow memops with frame indexes as address
  operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275569 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-07-15 15:35:52 +00:00
Krzysztof Parzyszek
f104001091 [Hexagon] Register save/restore functions do not follow regular conventions 
Do not mark them as modifying any of the volatile registers by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267433 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-25 17:49:44 +00:00
Craig Topper
85f08cc0b8 [Hexagon] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267266 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-23 02:49:31 +00:00
Krzysztof Parzyszek
2d715342de [Hexagon] Fix printing the address operand of S2_storerinewabs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266811 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-04-19 20:20:33 +00:00
Krzysztof Parzyszek
d4af74e531 [Hexagon] Add support for run-time stack overflow checking 
Patch by Sundeep Kushwaha.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264328 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-03-24 20:20:07 +00:00
Krzysztof Parzyszek
deffc78c77 [Hexagon] Generate PIC-specific versions of save/restore routines 
In PIC mode, the registers R14, R15 and R28 are reserved for use by
the PLT handling code. This causes all functions to clobber these
registers. While this is not new for regular function calls, it does
also apply to save/restore functions, which do not follow the standard
ABI conventions with respect to the volatile/non-volatile registers.

Patch by Jyotsna Verma.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264324 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-03-24 19:18:48 +00:00
Krzysztof Parzyszek
bd6b8064ca [Hexagon] Add support for __builtin_prefetch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261210 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-02-18 13:58:38 +00:00
Krzysztof Parzyszek
5e17ebd723 [Hexagon] Use zero-extending loads for anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@260895 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-02-15 16:01:01 +00:00
Krzysztof Parzyszek
934777b603 [Hexagon] Add implicit uses of GP to GP-relative loads and stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257337 91177308-0d34-0410-b5e6-96231b3b80d8
 2016-01-11 15:49:58 +00:00
Krzysztof Parzyszek
311fb07b3b [Hexagon] Add PIC support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256025 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-12-18 20:19:30 +00:00
Krzysztof Parzyszek
4855629115 [Hexagon] Remove TFRI_V4 instruction, use existing A2_tfrsi instead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254539 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-12-02 19:44:35 +00:00
Krzysztof Parzyszek
a1bbb47859 [Hexagon] Update instruction formats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253867 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-23 14:09:26 +00:00
Colin LeMahieu
a7f0a0a566 [Hexagon] Fixing store instructions and reenabling a few more tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252561 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-10 00:22:00 +00:00
Colin LeMahieu
5ca8076fcc [Hexagon] Fixing load instruction parsing and reenabling tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252555 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-11-10 00:02:27 +00:00
Krzysztof Parzyszek
84aa3b5def [Hexagon] Fix isNVStorable flag in .td files 
An upper half and a double word cannot be used as value sources in a
new-value store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250867 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-10-20 22:40:57 +00:00
Krzysztof Parzyszek
1f2d4d356d [Hexagon] Remove the remnants of isConstExtProfitable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250845 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-10-20 19:04:53 +00:00
Colin LeMahieu
750b351b76 [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239161 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-06-05 16:00:11 +00:00
Colin LeMahieu
4e8f68f245 Revert r239095 incorrect test tree. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239102 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-06-04 21:32:42 +00:00
Colin LeMahieu
60b4c7fc30 [Hexagon] Adding functionality for duplexing. Duplexing is a way to compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239095 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-06-04 21:16:16 +00:00
Sergey Dmitrouk
1f7a90d793 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235989 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-28 14:05:47 +00:00
Daniel Jasper
515cc265c9 Revert "[DebugInfo] Add debug locations to constant SD nodes" 
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235987 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-28 13:38:35 +00:00
Sergey Dmitrouk
716c5d8a30 [DebugInfo] Add debug locations to constant SD nodes 
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235977 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-28 11:56:37 +00:00
Krzysztof Parzyszek
bbe056c9bc [Hexagon] Some cleanup of instruction selection code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235552 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 21:17:00 +00:00
Krzysztof Parzyszek
3c55df1e84 [Hexagon] Use A2_tfrsi for constant pool and jump table addresses 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235535 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-22 18:25:53 +00:00
Krzysztof Parzyszek
a42f6b9a58 [Hexagon] Patterns for frame index with offset for isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235418 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-04-21 21:28:03 +00:00
Krzysztof Parzyszek
7b110fe366 Remove unused complex patterns for addressing modes on Hexagon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232057 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-12 16:44:50 +00:00
Krzysztof Parzyszek
9a062b62a7 Eliminate constant-extender profitability checks from Hexagon isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231992 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-12 00:19:59 +00:00
Colin LeMahieu
7a46f6f381 [Hexagon] Adding frame index + add load/store patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231850 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 21:24:13 +00:00
Colin LeMahieu
287bb3bc2b [Hexagon] Simplifying deallocret definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231847 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 21:12:32 +00:00
Colin LeMahieu
25ab8bad1c [Hexagon] Separating InstHexagon from OpcodeHexagon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231844 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 20:56:22 +00:00
Colin LeMahieu
7761008c2a [Hexagon] Adding nodes for PIC support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231829 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 20:04:44 +00:00
Colin LeMahieu
f41bfa16eb [Hexagon] Adding DuplexInst instruction format and duplex class defs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231828 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-10 19:53:14 +00:00
Colin LeMahieu
a0ce232a65 [Hexagon] Eliminating immediate condition set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231693 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-09 19:57:18 +00:00
Colin LeMahieu
11179629b5 [Hexagon] Adding vector load with post-increment instructions. Adding decoder function for 64bit control register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228708 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-10 16:59:36 +00:00
Colin LeMahieu
76419c0533 [Hexagon] Adding missing load instructions and removing an unused multiclass parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228630 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 23:45:24 +00:00
Colin LeMahieu
f7d4569298 [Hexagon] Factoring classes out of some load patterns and deleting some unused ones. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228627 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 23:05:44 +00:00
Colin LeMahieu
3bddb8b918 [Hexagon] Removing more V4 predicates since V4 is the required minimum. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228614 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 21:56:37 +00:00
Colin LeMahieu
4b97d2ca91 [Hexagon] Removing v2-4 flags. V4 is the minimum supported version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228605 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 21:07:35 +00:00
Colin LeMahieu
e17141f9f3 [Hexagon] Cleaning up definition formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228593 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-09 19:24:44 +00:00
Colin LeMahieu
ff7b5e9dda [Hexagon] Renaming v4 compare-and-jump instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228349 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-05 22:03:32 +00:00
Colin LeMahieu
9d547b618c [Hexagon] Since decoding conflicts have been resolved, isCodeGenOnly = 0 by default and remove explicitly setting it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228316 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-05 17:32:17 +00:00
Colin LeMahieu
91568ff3aa [Hexagon] Deleting unused instructions and adding isCodeGenOnly to some defs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228238 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-05 00:10:16 +00:00
Colin LeMahieu
69a33e427e [Hexagon] Updating load extend to i64 patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228237 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-04 23:55:16 +00:00
Colin LeMahieu
2747f4aaf5 [Hexagon] Cleaning up i1 load and extension patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228232 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-04 23:27:48 +00:00
Colin LeMahieu
083cc71ab3 [Hexagon] Simplifying more load and store patterns and using new addressing patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228231 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-04 23:23:16 +00:00