Commit Graph

154019 Commits

Author SHA1 Message Date
Adam Nemet
a155485803 Split opt-remark YAML and opt output testing on this test
This prepares for https://reviews.llvm.org/D33514

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312544 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 18:03:39 +00:00
Craig Topper
035520018a [AVX512] Remove patterns for (v8f32 (X86vzmovl (insert_subvector undef, (v4f32 (scalar_to_vector FR32X:)), (iPTR 0)))) and the same for v4f64.
We don't have this same pattern for AVX2 so I don't believe we should have it for AVX512. We also didn't have it for v16f32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312543 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 17:33:58 +00:00
Konstantin Zhuravlyov
f9ab88e18d AMDGPU/NFC: Cleanup/refactor SIMemoryLegalizer [2]:
- Make SIMemOpInfo a class
  - Add accessor methods to SIMemOpInfo
  - Move get*Info methods to SIMemOpInfo

Differential Revision: https://reviews.llvm.org/D37395


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312541 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 16:41:25 +00:00
Konstantin Zhuravlyov
c0c4768b6b AMDGPU/NFC: Cleanup/refactor SIMemoryLegalizer [1]:
- Rename MemOpInfo -> SIMemOpInfo
  - Move SIMemOpInfo class out of SIMemoryLegalizer class

Differential Revision: https://reviews.llvm.org/D37394


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312540 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 16:18:05 +00:00
Simon Pilgrim
b474446ca8 [AMDGPU] Added extra test checks to make D19325 diff clearer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312537 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 14:32:06 +00:00
Simon Pilgrim
76db91a4f0 [X86] Limit store merge size when implicitfloat is enabled (PR34421)
As suggested by @niravd : https://bugs.llvm.org/show_bug.cgi?id=34421#c2

Differential Revision: https://reviews.llvm.org/D37464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312534 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 13:40:29 +00:00
Simon Pilgrim
5cc5a8f0d9 Strip trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312531 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 12:32:16 +00:00
Simon Pilgrim
34cbdf56ca [X86] Regenerate scalar rotation tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312530 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 12:28:30 +00:00
Simon Pilgrim
d5802f5e18 [X86][AVX512] Use AVX512 attributes instead of -mcpu in vector shift tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312529 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 12:23:45 +00:00
Simon Pilgrim
3eb1ddf19a [X86][AVX512] Use AVX512 attributes instead of -mcpu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312528 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 12:05:14 +00:00
Jonas Devlieghere
b7673dfb93 Fix test/DebugInfo/dwarfdump-decompression-invalid-size.test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312527 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 11:59:16 +00:00
Jonas Devlieghere
95c992eb85 [Decompression] Fail gracefully when out of memory
This patch adds failing gracefully when running out of memory when
allocating a buffer for decompression.

This provides a work-around for:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3224

Differential revision: https://reviews.llvm.org/D37447

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312526 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 11:21:38 +00:00
Diana Picus
853df63505 [ARM] GlobalISel: Minor cleanups in inst selector
Use the STI member of ARMInstructionSelector instead of
TII.getSubtarget() and also make use of STI's methods instead of
checking the object format manually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312522 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 08:22:47 +00:00
Diana Picus
cd919a1d28 [ARM] GlobalISel: Support global variables for RWPI
In RWPI code, globals that are not read-only are accessed relative to
the SB register (R9). This is achieved by explicitly generating an ADD
instruction between SB and an offset that we either load from a constant
pool or movw + movt into a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312521 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 07:57:41 +00:00
Craig Topper
109ad35326 [X86] Add hasSideEffects=0 and mayLoad=1 to some instructions that recently had their patterns removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312520 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 05:49:44 +00:00
Craig Topper
203c00ded6 [InstCombine] Add test cases for folding (select (icmp ne/eq (and X, C1), (bitwiseop Y, C2), Y -> (bitwiseop Y, (shl/shr (and X, C1), C3)) or similar.
This is possible if C1 and C2 are both powers of 2. Or if binop is 'and' then ~C2 needs to be a power of 2.

We already support this for 'or', but we should be able to support 'and' and 'xor'. This will be enhanced by D37274.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312519 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 05:26:38 +00:00
Craig Topper
783862083c [InstCombine] Move foldSelectICmpAnd helper function earlier in the file to enable reuse in a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312518 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 05:26:37 +00:00
Craig Topper
f10caaa503 [InstCombine] In foldSelectIntoOp, avoid creating a Constant before we know for sure we're going to use it and avoid an unnecessary call to m_APInt.
Instead of creating a Constant and then calling m_APInt with it (which will always return true). Just create an APInt initially, and use that for the checks in isSelect01 function. If it turns out we do need the Constant, create it from the APInt.

This is a refactor for a future patch that will do some more checks of the constant values here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312517 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 05:26:36 +00:00
Lang Hames
8d77549810 [ORC] Add some more docs/comments to the RemoteObjectLayer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312516 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 05:06:05 +00:00
Lang Hames
f8e261bca5 [ORC] Exclude RemoteObjectLayer from the ExecutionEngine module, as modules
builds seem to be having trouble with it.

http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/11401

When trying to link lli-child-target, the linker reports missing symbols for
the 'Name' members of 'rpc::Function<OrcRPCNegotiate, FunctionIdT(std::string)>'
(base class for OrcRPCNegotiate) and 'rpc::Function<OrcRPCResponse, void()>'
(base class for OrcRPCResponse), despite there being definitions for these
immediately below the rpc::Function class template.

This looks like the same bug that bit OrcRemoteTargetClient/Server in r286920.

<rdar://problem/34249745>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312515 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 04:31:14 +00:00
Hiroshi Inoue
7166ffbe09 [PowerPC] eliminate redundant compare instruction
If multiple conditional branches are executed based on the same comparison, we can execute multiple conditional branches based on the result of one comparison on PPC. For example,

if (a == 0) { ... }
else if (a < 0) { ... }

can be executed by one compare and two conditional branches instead of two pairs of a compare and a conditional branch.

This patch identifies a code sequence of the two pairs of a compare and a conditional branch and merge the compares if possible.
To maximize the opportunity, we do canonicalization of code sequence before merging compares.
For the above example, the input for this pass looks like:

cmplwi r3, 0
beq    0, .LBB0_3
cmpwi  r3, -1
bgt    0, .LBB0_4

So, before merging two compares, we canonicalize it as

cmpwi  r3, 0       ; cmplwi and cmpwi yield same result for beq
beq    0, .LBB0_3
cmpwi  r3, 0       ; greather than -1 means greater or equal to 0
bge    0, .LBB0_4

The generated code should be

cmpwi  r3, 0
beq    0, .LBB0_3
bge    0, .LBB0_4

Differential Revision: https://reviews.llvm.org/D37211



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312514 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 04:15:17 +00:00
Lang Hames
a9601423aa [ORC] Drop callB wrapper from the remote object layer added in r312511.
This snippet was accidentally in the final commit, but is unused.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312513 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 04:11:51 +00:00
Lang Hames
e20d26a3b3 [ORC] Add a pair of ORC layers that forward object-layer operations via RPC.
This patch introduces RemoteObjectClientLayer and RemoteObjectServerLayer,
which can be used to forward ORC object-layer operations from a JIT stack in
the client to a JIT stack (consisting only of object-layers) in the server.

This is a new way to support remote-JITing in LLVM. The previous approach
(supported by OrcRemoteTargetClient and OrcRemoteTargetServer) used a
remote-mapping memory manager that sat "beneath" the JIT stack and sent
fully-relocated binary blobs to the server. The main advantage of the new
approach is that relocatable objects can be cached on the server and re-used
(if the code that they represent hasn't changed), whereas fully-relocated blobs
can not (since the addresses they have been permanently bound to will change
from run to run).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312511 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 03:34:09 +00:00
Daniel Berlin
110f9f2e80 NewGVN: Fix PR 34430 - we need to look through predicateinfo copies to detect self-cycles of phi nodes. We also need to not ignore certain types of arguments when testing whether the phi has a backedge or was originally constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312510 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 02:17:43 +00:00
Daniel Berlin
660fd0b5be NewGVN: Fix PR 34452 by passing instruction all the way down when we do aggregate value simplification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312509 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 02:17:42 +00:00
Daniel Berlin
d17cd5cd24 NewGVN: Detect copies through predicateinfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312508 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 02:17:41 +00:00
Daniel Berlin
190a294869 NewGVN: Change where check for original instruction in phi of ops leader finding is done. Where we had it before, we would stop looking when we hit the original instruction, but skip it. Now we skip it and keep looking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312507 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-05 02:17:40 +00:00
Sanjay Patel
cfc091852b [x86] add tests for vector store merge opportunity; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312504 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 22:01:25 +00:00
Sanjay Patel
07477455af [x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312503 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 21:46:05 +00:00
Sanjay Patel
9435706923 [x86] add/regenerate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312502 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 21:43:32 +00:00
Lang Hames
30e9aa60fe [ORC] Refactor OrcRemoteTarget code to expose its RPC API, reduce
code duplication in the client, and improve error propagation.

This patch moves the OrcRemoteTarget rpc::Function declarations from
OrcRemoteTargetRPCAPI into their own namespaces under llvm::orc::remote so that
they can be used in new contexts (in particular, a remote-object-file adapter
layer that I will commit shortly).

Code duplication in OrcRemoteTargetClient (especially in loops processing the
code, rw-data and ro-data allocations) is removed by moving the loop bodies
into their own functions.

Error propagation is (slightly) improved by adding an ErrorReporter functor to
the OrcRemoteTargetClient -- Errors that can't be returned (because they occur
in destructors, or behind stable APIs that don't provide error returns) can be
sent to the ErrorReporter instead. Some methods in the Client API are also
changed to make better use of the Expected class: returning Expected<T>s rather
than returning Errors and taking T&s to store the results.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312500 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 20:54:46 +00:00
Sanjay Patel
8bafe87c16 [x86] add test for unnecessary cmp + masked store; NFC
As noted in PR11210:
https://bugs.llvm.org/show_bug.cgi?id=11210
...fixing this should allow us to eliminate x86-specific masked store intrinsics in IR.
(Although more testing will be needed to confirm that.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312496 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 17:21:17 +00:00
Sam McCall
c7c869be7e Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding""
This crashes on boringSSL on PPC (will send reduced testcase)

This reverts commit r312328.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312490 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 15:47:00 +00:00
Strahinja Petrovic
a78328c441 Fix test/Transforms/GlobalOpt/integer-bool-dwarf
This patch fixes regression related with 
integer-bool-dwarf test.

Patch by Nikola Prica.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312489 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 15:14:37 +00:00
Michael Zuckerman
e11eab53ee Update test for testing avx512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312487 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 14:15:34 +00:00
Simon Pilgrim
f070a0d73d [X86][AVX512] Add support for VPERMILPS v16f32 shuffle lowering (PR34382)
Avoid use of VPERMPS where we don't need it by instead using the variable mask version of VPERMILPS for unary shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312486 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 13:51:57 +00:00
Simon Pilgrim
e6cf8170cc Added shuffle test case from PR34382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312485 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 13:43:13 +00:00
Simon Pilgrim
2677f9404b Added shuffle test case from PR34369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312481 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 11:08:47 +00:00
George Rimar
5afc1530d6 [DebugInfo] - Fix for lld DWARF parsing of base address selection entries in range lists.
It solves issue of wrong section index evaluating for ranges when
base address is used.

Based on David Blaikie's patch D36097.

Differential revision: https://reviews.llvm.org/D37214

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312477 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 10:30:39 +00:00
Ayman Musa
228d11f2a9 [X86] Replace -mcpu option with -mattr in LIT tests added in https://reviews.llvm.org/rL312442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312474 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 09:31:32 +00:00
Igor Breger
4e66147d1e [GlobalISel][X86] G_PHI support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312473 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 09:06:45 +00:00
Zvi Rackover
3438d07f09 LoopVectorize: MaxVF should not be larger than the loop trip count
Summary:
Improve how MaxVF is computed while taking into account that MaxVF should not be larger than the loop's trip count.

Other than saving on compile-time by pruning the possible MaxVF candidates, this patch fixes pr34438 which exposed the following flow:
1. Short trip count identified -> Don't bail out, set OptForSize:=True to avoid tail-loop and runtime checks.
2. Compute MaxVF returned 16 on a target supporting AVX512.
3. OptForSize -> choose VF:=MaxVF.
4. Bail out because TripCount = 8, VF = 16, TripCount % VF !=0 means we need a tail loop.

With this patch step 2. will choose MaxVF=8 based on TripCount.

Reviewers: Ayal, dorit, mkuper, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D37425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312472 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 08:35:13 +00:00
Sam Parker
040fcc3883 [LoopUnroll][DebugInfo] Don't add metadata to unrolled remainder loop
Debug information can be, and was, corrupted when the runtime
remainder loop was fully unrolled. This is because a !null node can
be created instead of a unique one describing the loop. In this case,
the original node gets incorrectly updated with the NewLoopID
metadata.

In the case when the remainder loop is going to be quickly fully
unrolled, there isn't the need to add loop metadata for it anyway.

Differential Revision: https://reviews.llvm.org/D37338


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312471 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 08:12:16 +00:00
Craig Topper
a3a4b98839 [X86] Remove duplicate FMA patterns from the isel table.
This reorders some patterns to get tablegen to detect them as duplicates. Tablegen only detects duplicates when creating variants for commutable operations. It does not detect duplicates between the patterns as written in the td file. So we need to ensure all the FMA patterns in the td file are unique.

This also uses null_frag to remove some other unneeded patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312470 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 07:35:05 +00:00
Craig Topper
cf7f25d947 [X86] Mark the FMA nodes as commutable so tablegen will auto generate the patterns.
This uses the capability introduced in r312464 to make SDNode patterns commutable on the first two operands.

This allows us to remove some of the extra FMA patterns that have to put loads and mask operands in different places to cover all cases. This even includes patterns that were missing to support match a load in the first operand with FMA4. Non-broadcast loads with masking for AVX512.

I believe this is causing us to generate some duplicate patterns because tablegen's isomorphism checks don't catch isomorphism between the patterns as written in the td. It only detects isomorphism in the commuted variants it tries to create. The the unmasked 231 and 132 memory forms are isomorphic as written in the td file so we end up keeping both. I think we precommute the 132 pattern to fix this.

We also need a follow up patch to go back to the legacy FMA3 instructions and add patterns to the 231 and 132 forms which we currently don't have.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312469 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 06:59:50 +00:00
Dean Michael Berris
cfbb872e5e [XRay][CodeGen] Use PIC-friendly code in XRay sleds and remove synthetic references in .text
Summary:
This is a re-roll of D36615 which uses PLT relocations in the back-end
to the call to __xray_CustomEvent() when building in -fPIC and
-fxray-instrument mode.

Reviewers: pcc, djasper, bkramer

Subscribers: sdardis, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D37373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312466 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 05:34:58 +00:00
Craig Topper
911f6bba33 [TableGen] Teach tablegen to allow SDNPCommutable nodes with more than 2 operands.
Summary:
Tablegen already supports commutable instrinsics with more than 2 operands. There it just assumes the first two operands are commutable.

I plan to use this to improve the generation of FMA patterns in the X86 backend.

Reviewers: aymanmus, zvi, RKSimon, spatel, arsenm

Reviewed By: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D37430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312464 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 03:44:33 +00:00
Craig Topper
7f04a10c78 [X86] Add a combine to recognize when we have two insert subvectors that together write the whole vector, but the starting vector isn't undef.
In this case we should replace the starting vector with undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312462 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 01:13:36 +00:00
Craig Topper
4f1ba3dc7d [X86] Remove some unnecessary curly braces and blank line. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312461 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-04 01:13:34 +00:00
Craig Topper
42d6767626 [X86] Add a combine to turn (insert_subvector zero, (insert_subvector zero, X, Idx), Idx) into an insert of X into the larger zero vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312460 91177308-0d34-0410-b5e6-96231b3b80d8
2017-09-03 22:25:52 +00:00