17 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
c5dd216734 [Hexagon] Allow setting register in BitVal without storing into map
In the bit tracker, references to other bit values in which the register
is 0 are prohibited. This means that generating self-referential register
cells like { w:32 [0-15]:s[0-15] [16-31]:s[15] } is impossible. In order
to get a self-referential cell, it had to be stored into a map and then
reloaded from it. To avoid this step, add a function that will set the
register to a given value without going through the map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296025 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-23 22:08:50 +00:00
Eugene Zelenko
8fa7bb4231 [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290925 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-04 02:02:05 +00:00
Krzysztof Parzyszek
70a4ffa2a1 [Hexagon] Clear the flow queue after visiting a single instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281339 91177308-0d34-0410-b5e6-96231b3b80d8
2016-09-13 14:36:55 +00:00
Krzysztof Parzyszek
89c1dd3771 [Hexagon] Remove unnecessary llvm::, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279244 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-19 14:10:57 +00:00
Krzysztof Parzyszek
e69cb72fc1 [Hexagon-ish] Add function to print cell map contents in bit tracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277622 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-03 18:13:32 +00:00
Krzysztof Parzyszek
aa3e2e6820 [Hexagon] Rerun bit tracker on new instructions in RIE
Consider this case:
  vreg1 = A2_zxth vreg0   (1)
  ...
  vreg2 = A2_zxth vreg1   (2)

Redundant instruction elimination could delete the instruction (1)
because the user (2) only cares about the low 16 bits. Then it could
delete (2) because the input is already zero-extended. The problem
is that the properties allowing each individual instruction to be
deleted depend on the existence of the other instruction, so either
one can be deleted, but not both.
The existing check for this situation in RIE was insufficient. The
fix is to update all dependent cells when an instruction is removed
(replaced via COPY) in RIE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276792 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-26 19:08:45 +00:00
Duncan P. N. Exon Smith
8c13ec21d3 Hexagon: Avoid implicit iterator conversions, NFC
Avoid implicit iterator conversions from MachineInstrBundleIterator to
MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr&
over MachineInstr* and switching to range-based for loops.

There's a long tail of API cleanup here, but I'm planning to leave the
rest to the Hexagon maintainers.  HexagonInstrInfo defines many of its
own predicates, and most of them still take MachineInstr*.  Some of
those actually check for nullptr, so I didn't feel comfortable changing
them to MachineInstr& en masse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275142 91177308-0d34-0410-b5e6-96231b3b80d8
2016-07-12 01:55:32 +00:00
Benjamin Kramer
04a303b821 Avoid copies of std::strings and APInt/APFloats where we only read from it
As suggested by clang-tidy's performance-unnecessary-copy-initialization.
This can easily hit lifetime issues, so I audited every change and ran the
tests under asan, which came back clean.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272126 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-08 10:01:20 +00:00
Krzysztof Parzyszek
5270eb997f [Hexagon] Fix compilation error with GCC 6
Compiling Hexagon target with GCC 6 produces "error: should have been
declared inside" due to GCC PR c++/69657 which was merged.

Properly wrapping operator<<() definitions within the namespace llvm
fixes the issue.

Author: domagoj.stolfa

Differential Revision: http://reviews.llvm.org/D17281


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261220 91177308-0d34-0410-b5e6-96231b3b80d8
2016-02-18 16:10:27 +00:00
Duncan P. N. Exon Smith
5013c51dfc ADT: Remove last implicit ilist iterator conversions, NFC
Some implicit ilist iterator conversions have crept back into Analysis,
Transforms, Hexagon, and llvm-stress.  This removes them.

I'll commit a patch immediately after this to disallow them (in a
separate patch so that it's easy to revert if necessary).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252371 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-07 00:01:16 +00:00
Krzysztof Parzyszek
014b76cd0f [Hexagon] Do not fall-through if there is no CFG edge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-20 19:30:21 +00:00
Duncan P. N. Exon Smith
8525f3a7bc Hexagon: Remove implicit ilist iterator conversions, NFC
There are two things out of the ordinary in this commit.  First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp.  After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition.  This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.

Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`).  While not incorrect,
it's fragile.  I switched this to `::instr_end()`.

All that said, no functionality change intended here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-20 00:46:39 +00:00
Reid Kleckner
c0e64ada5c [WinEH] Add some support for code generating catchpad
We can now run 32-bit programs with empty catch bodies.  The next step
is to change PEI so that we get funclet prologues and epilogues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246235 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-27 23:27:47 +00:00
Benjamin Kramer
7e320cc2c8 [Hexagon] Use composition instead of inheritance from STL types
The standard containers are not designed to be inherited from, as
illustrated by the MSVC hacks for NodeOrdering. No functional change
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-18 17:43:23 +00:00
Benjamin Kramer
360ec4c35f [Hexagon] Move BitTracker into the llvm namespace and remove redundant qualifications
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 20:38:16 +00:00
Krzysztof Parzyszek
70bb40bd17 [Hexagon] Fix unused variable warnings in NDEBUG build caused by r241595
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241600 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 16:02:11 +00:00
Krzysztof Parzyszek
41e59a6d7b [Hexagon] Implement bit-tracking facility with specifics for Hexagon
This includes code that is intended to be target-independent as well
as the Hexagon-specific details. This is just the framework without
any users.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241595 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:16:42 +00:00