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2 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
7f4371b614 [Hexagon] Replace instruction definitions with auto-generated ones 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294753 91177308-0d34-0410-b5e6-96231b3b80d8
 2017-02-10 15:33:13 +00:00
Brendon Cahoon
abf95a22c4 [Hexagon] Generate hardware loop for a vectorized loop 
The induction variable in the vectorized loop wasn't
recognized properly, so a hardware loop wasn't generated.

Differential Revision: http://reviews.llvm.org/D9722


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237388 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-05-14 20:36:19 +00:00