Added relocation names:
- R_AMDGPU_GOTPCREL32_LO
- R_AMDGPU_GOTPCREL32_HI
- R_AMDGPU_REL32_LO
- R_AMDGPU_REL32_HI
AMDGPU isa only supports 32-bit immediates. In order to access 64-bit address we need to generate 32-bit lo/hi relocations, and do the right math (separate patch). Currently we only generate one 32 bit relocation for lower bits for each access, losing higher bits. Hence we need relocations listed above.
Differential Revision: https://reviews.llvm.org/D25546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284191 91177308-0d34-0410-b5e6-96231b3b80d8
Summary: This change fix bug in AMDGPU disassembly. Previously, presence of symbols other than kernel symbols caused objdump to skip begining of those symbols.
Reviewers: tstellarAMD, vpykhtin, Bigcheese, ruiu
Subscribers: kzhuravl, arsenm
Differential Revision: http://reviews.llvm.org/D21966
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278921 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
Our YAML library's handling of tags isn't perfect, but it is good enough to get rid of the need for the --format argument to yaml2obj. This patch does exactly that.
Instead of requiring --format, it infers the format based on the tags found in the object file. The supported tags are:
!ELF
!COFF
!mach-o
!fat-mach-o
I have a corresponding patch that is quite large that fixes up all the in-tree test cases.
Reviewers: rafael, Bigcheese, compnerd, silvas
Subscribers: compnerd, llvm-commits
Differential Revision: http://reviews.llvm.org/D21711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273915 91177308-0d34-0410-b5e6-96231b3b80d8
Summary:
Version 2 is now the default. If you want to emit version 1, use
the amdgcn--amdhsa-amdcov1 triple.
Reviewers: arsenm, kzhuravl
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268647 91177308-0d34-0410-b5e6-96231b3b80d8
Reenable reverted r265550 with endianness issue fixed. Variables of
endian-aware types such as ulittle32_t should be explicitly casted
to their natural equivalent types before passing it as vararg to
printf like functions (format in my case). Added lit config file
depending on AMDGPU target as the testcase uses assembler.
Differential revision: http://reviews.llvm.org/D16998
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265645 91177308-0d34-0410-b5e6-96231b3b80d8
This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265554 91177308-0d34-0410-b5e6-96231b3b80d8
