127 Commits

Author SHA1 Message Date
Alex Lorenz
c7804ab6e5 MIR Serialization: Serialize the pointer IR expression values in the machine
memory operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-21 21:54:12 +00:00
Alex Lorenz
e2e6dea9f2 MIR Serialization: Use the global value syntax for global value memory operands.
This commit modifies the serialization syntax so that the global IR values in
machine memory operands use the global value '@<name>' syntax instead of the
current '%ir.<name>' syntax.

The unnamed global IR values are handled by this commit as well, as the
existing global value parsing method can parse the unnamed globals already.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245527 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-20 00:20:03 +00:00
Alex Lorenz
77676424fd MIR Serialization: Change syntax for the call entry pseudo source values.
The global IR values in machine memory operands should use the global value
'@<name>' syntax instead of the current '%ir.<name>' syntax.

However, the global value call entry pseudo source values use the global value
syntax already. Therefore, the syntax for the call entry pseudo source values
has to be changed so that the global values and call entry global value PSVs
can be parsed without ambiguities.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245526 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-20 00:12:57 +00:00
Alex Lorenz
e8a419727a MIR Serialization: Serialize unnamed local IR values in memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 23:31:05 +00:00
Alex Lorenz
dab6ae0096 MIR Serialization: Serialize instruction's register ties.
This commit serializes the machine instruction's register operand ties.
The ties are printed out only when the instructon has register ties that are
different from the ties that are specified in the instruction's description.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 19:05:34 +00:00
Alex Lorenz
baf422e9ec MIR Serialization: Serialize defined registers that require 'def' register flag.
The defined registers are already serialized - they are represented by placing
them before the '=' in a machine instruction. However, certain instructions like
INLINEASM can have defined register operands after the '=', so this commit
introduces the 'def' register flag for such operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 18:55:47 +00:00
Alex Lorenz
a80c044041 MIR Serialization: Serialize MMI's variable debug information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-19 00:13:25 +00:00
Alex Lorenz
b081f06745 MIR Parser: Return true on error when parsing standalone registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245384 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-18 22:57:36 +00:00
Alex Lorenz
6f3cafb93e MIR Serialization: Serialize the operand's bit mask target flags.
This commit adds support for bit mask target flag serialization to the MIR
printer and the MIR parser. It also adds support for the machine operand's
target flag serialization to the AArch64 target.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245383 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-18 22:52:15 +00:00
Alex Lorenz
07c6bd8492 MIR Serialization: Serialize the frame information's stack protector index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245372 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-18 22:26:26 +00:00
Alex Lorenz
3f6954d463 MIR Parser: Implicit register verifier should accept unexpected implicit
subregister operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-18 17:17:13 +00:00
Alex Lorenz
fb764b70be MIR Serialization: Serialize the local offsets for the stack objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245249 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-17 22:17:42 +00:00
Alex Lorenz
e45daf6294 MIR Serialization: Serialize the memory operand's range metadata node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245247 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-17 22:09:52 +00:00
Alex Lorenz
971d8c0000 MIR Serialization: Serialize the memory operand's noalias metadata node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245246 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-17 22:08:02 +00:00
Alex Lorenz
ed8c969d30 MIR Serialization: Serialize the memory operand's alias scope metadata node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245245 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-17 22:06:40 +00:00
Alex Lorenz
d3ff211ac7 MIR Serialization: Serialize the memory operand's TBAA metadata node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-17 22:05:15 +00:00
Alex Lorenz
b445d0c988 MIR Serialization: Serialize the '.cfi_same_value' CFI directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245103 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 21:55:58 +00:00
Alex Lorenz
643f4bcad9 MIR Serialization: Serialize the external symbol call entry pseudo source
values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 21:14:50 +00:00
Alex Lorenz
78f9b57b68 MIR Serialization: Serialize the global value call entry pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245097 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 21:08:30 +00:00
Alex Lorenz
6ad9b2163c MIR Serialization: Serialize the 'internal' register operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245085 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 19:07:07 +00:00
Alex Lorenz
46d5ea66a3 MIR Serialization: Serialize the bundled machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245082 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-14 18:57:24 +00:00
Alex Lorenz
5d09c2f25d MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244982 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-13 23:10:16 +00:00
Alex Lorenz
1b93706717 MIR Parser: Don't allow negative alignments for memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244953 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-13 20:55:01 +00:00
Alex Lorenz
79faadca28 MIR Parser: Allow the MI IR references to reference global values.
This commit fixes a bug where MI parser couldn't resolve the named IR
references that referenced named global values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244817 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 21:27:16 +00:00
Alex Lorenz
c338a581fd MIR Serialization: Serialize the fixed stack pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244816 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 21:23:17 +00:00
Alex Lorenz
710eecab5d MIR Serialization: Serialize the jump table pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244813 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 21:11:08 +00:00
Alex Lorenz
6b8e62f3f5 MIR Serialization: Serialize the GOT pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 21:00:22 +00:00
Alex Lorenz
3f0c495bbb MIR Serialization: Serialize the stack pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 20:44:16 +00:00
Alex Lorenz
ad20340006 MIR Serialization: Serialize the constant pool pseudo source values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-12 20:33:26 +00:00
Alex Lorenz
2a04c76ecd MIR Serialization: Serialize UsedPhysRegMask from the machine register info.
This commit serializes the UsedPhysRegMask register mask from the machine
register information class. The mask is serialized as an inverted
'calleeSavedRegisters' mask to keep the output minimal.

This commit also allows the MIR parser to infer this mask from the register
mask operands if the machine function doesn't specify it.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244548 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-11 00:32:49 +00:00
Alex Lorenz
2084c0d3a2 MIR Parser: Report an error when a stack object is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-10 23:50:41 +00:00
Alex Lorenz
dd0dde5b84 MIR Parser: Report an error when a fixed stack object is redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244534 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-10 23:45:02 +00:00
Alex Lorenz
8615171600 MIR Serialization: Serialize the liveout register mask machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-10 23:24:42 +00:00
Alex Lorenz
812f70661d MIR Serialization: Serialize the base alignment for the machine memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-07 20:48:30 +00:00
Alex Lorenz
74e6108fa5 MIR Serialization: Serialize the offsets for the machine memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244356 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-07 20:26:52 +00:00
Alex Lorenz
b12f9b3954 MIR Serialization: Fix serialization of unnamed IR block references.
The block address machine operands can reference IR blocks in other functions.
This commit fixes a bug where the references to unnamed IR blocks in other
functions weren't serialized correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244299 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 23:57:04 +00:00
Alex Lorenz
dcfc698997 MIR Parser: Report an error when parsing duplicate memory operand flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244240 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 18:26:36 +00:00
Alex Lorenz
7a40257530 MIR Serialization: Serialize the 'invariant' machine memory operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244230 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 16:55:53 +00:00
Alex Lorenz
3c4339b0dc MIR Serialization: Serialize the 'non-temporal' machine memory operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244228 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 16:49:30 +00:00
Alex Lorenz
3c99e77ff9 MIR Serialization: Initial serialization of the machine operand target flags.
This commit implements the initial serialization of the machine operand target
flags. It extends the 'TargetInstrInfo' class to add two new methods that help
to provide text based serialization for the target flags.

This commit can serialize only the X86 target flags, and the target flags for
the other targets will be serialized in the follow-up commits.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-06 00:44:07 +00:00
Alex Lorenz
a41742659a MIR Serialization: Serialize the machine operand's offset.
This commit serializes the offset for the following operands: target index,
global address, external symbol, constant pool index, and block address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 22:26:15 +00:00
Alex Lorenz
97214282e0 MIR Parser: Report an error when parsing large immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244100 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 19:03:42 +00:00
Alex Lorenz
c2b7a3917e MIR Serialization: Serialize the typed immediate integer machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244098 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:52:21 +00:00
Alex Lorenz
0f3be315d6 MIR Parser: Report an error when parsing duplicate register flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244081 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 18:09:03 +00:00
Alex Lorenz
e40350d020 MIR Serialization: Serialize the 'early-clobber' register operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 17:49:03 +00:00
Alex Lorenz
13fa799e5f MIR Serialization: Serialize the 'debug-use' register operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-05 17:41:17 +00:00
Mehdi Amini
765426e84d Move generic MIR tests in their own subdir, requires "native" as well
These tests rely on the native backend to be built-in.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243959 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 06:32:45 +00:00
Alex Lorenz
1731b66081 MIR Serialization: Serialize the 'volatile' machine memory operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-04 00:24:45 +00:00
Alex Lorenz
3db44ce9a8 MIR Serialization: Initial serialization of the machine memory operands.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243915 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 23:08:19 +00:00
Duncan P. N. Exon Smith
c61bc48acb DI: Disallow uniquable DICompileUnits
Since r241097, `DIBuilder` has only created distinct `DICompileUnit`s.
The backend is liable to start relying on that (if it hasn't already),
so make uniquable `DICompileUnit`s illegal and automatically upgrade old
bitcode.  This is a nice cleanup, since we can remove an unnecessary
`DenseSet` (and the associated uniquing info) from `LLVMContextImpl`.

Almost all the testcases were updated with this script:

    git grep -e '= !DICompileUnit' -l -- test |
    grep -v test/Bitcode |
    xargs sed -i '' -e 's,= !DICompileUnit,= distinct !DICompileUnit,'

I imagine something similar should work for out-of-tree testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-08-03 17:26:41 +00:00