Commit Graph

84216 Commits

Author SHA1 Message Date
Rafael Espindola
556ddccf74 Don't create empty sections just to look like gas.
We are long past the time when this much bug for bug compatibility was
useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 20:02:22 +00:00
Teresa Johnson
5030f311e8 Revert "Move metadata linking after lazy global materialization/linking."
This reverts commit r251926. I believe this is causing an LTO
bootstrapping bot failure
(http://lab.llvm.org:8080/green/job/llvm-stage2-cmake-RgLTO_build/3669/).

Haven't been able to repro it yet, but after looking at the metadata I
am pretty sure I know what is going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251965 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 19:36:04 +00:00
Kostya Serebryany
af639be62f [libFuzzer] make -test_single_input more reliable: make sure the input's size is equal to it's capacity
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251961 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 18:57:25 +00:00
Rafael Espindola
49d691389e Delete dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251960 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 18:55:58 +00:00
Rafael Espindola
ca792d80c4 Simplify local common output.
We now create them as they are found and use higher level APIs.

This is a step in avoiding creating unnecessary sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251958 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 18:50:51 +00:00
Igor Laevsky
e78962ca4a [CodegenPrepare] Do not rematerialize gc.relocates across different basic blocks
Differential Revision: http://reviews.llvm.org/D14258



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251957 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 18:37:40 +00:00
Rafael Espindola
f026f70e79 Move code out of a loop and use a range loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 18:04:07 +00:00
Rafael Espindola
25d7145b34 Revert "Revert "[Orc] Directly emit machine code for the x86 resolver block and trampolines.""
This reverts commit r251937.

The test was updated to the new API, bring the API back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251944 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 16:40:37 +00:00
Silviu Baranga
94652aba1f Fix PR25372 - teach replaceCongruentPHIs to handle cases where SE evaluates a PHI to a SCEVConstant
Summary:
Since now Scalar Evolution can create non-add rec expressions for PHI
nodes, it can also create SCEVConstant expressions. This will confuse
replaceCongruentPHIs, which previously relied on the fact that SCEV
could not produce constants in this case.

We will now replace the node with a constant in these cases - or avoid
processing the Phi in case of a type mismatch.

Reviewers: sanjoy

Subscribers: llvm-commits, majnemer

Differential Revision: http://reviews.llvm.org/D14230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 16:27:04 +00:00
Rafael Espindola
1b023a319e Revert "[Orc] Directly emit machine code for the x86 resolver block and trampolines."
This reverts commit r251933.

It broke the build of examples/Kaleidoscope/Orc/fully_lazy/toy.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251937 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 16:25:20 +00:00
Lang Hames
73cd3516cc [Orc] Directly emit machine code for the x86 resolver block and trampolines.
Bypassing LLVM for this has a number of benefits:

1) Laziness support becomes asm-syntax agnostic (previously lazy jitting didn't
   work on Windows as the resolver block was in Darwin asm).

2) For cross-process JITs, it allows resolver blocks and trampolines to be
   emitted directly in the target process, reducing cross process traffic.

3) It should be marginally faster.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251933 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 16:10:18 +00:00
Teresa Johnson
20f7585a5c Move metadata linking after lazy global materialization/linking.
Summary:
Currently, named metadata is linked before the LazilyLinkGlobalValues
list is walked and materialized/linked. As a result, references
from DISubprogram and DIGlobalVariable metadata to yet unmaterialized
functions and variables cause them to be added to the lazy linking
list and their definitions are materialized and linked.

This makes the llvm-link -only-needed option not have the intended
effect when debug information is present, as the otherwise unneeded
functions/variables are still linked in.

Additionally, for ThinLTO I have implemented a mechanism to only link
in debug metadata needed by imported functions. Moving named metadata
linking after lazy GV linking will facilitate applying this mechanism
to the LTO and "llvm-link -only-needed" cases as well.

Reviewers: dexonsmith, tra, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251926 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 15:11:27 +00:00
Filipe Cabecinhas
32a2349a79 Don't assert if materializing before seeing any function bodies
This assert was reachable from user input. A minimized test case (no
FUNCTION_BLOCK_ID record) is attached.

Bug found with afl-fuzz

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251910 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 13:48:26 +00:00
Filipe Cabecinhas
b6e9fa5e10 Don't use Twine objects after their lifetimes end.
No test, since it would depend on what the compiler can optimize/reuse.
My next commit made this bug visible on Linux Release compiles with some
versions of gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251909 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 13:48:21 +00:00
Elena Demikhovsky
2c4a333422 LoopVectorizer - skip 'bitcast' between GEP and load.
Skipping 'bitcast' in this case allows to vectorize load:

  %arrayidx = getelementptr inbounds double*, double** %in, i64 %indvars.iv
  %tmp53 = bitcast double** %arrayidx to i64*
  %tmp54 = load i64, i64* %tmp53, align 8

Differential Revision http://reviews.llvm.org/D14112



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251907 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 10:29:34 +00:00
Michael Kuperstein
a64f17562f [X86] Generate .cfi_adjust_cfa_offset correctly when pushing arguments
When push instructions are being used to pass function arguments on
the stack, and either EH or debugging are enabled, we need to generate
.cfi_adjust_cfa_offset directives appropriately. For (synch) EH, it is
enough for the CFA offset to be correct at every call site, while
for debugging we want to be correct after every push.

Darwin does not support this well, so don't use pushes whenever it
would be required.

Differential Revision: http://reviews.llvm.org/D13767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251904 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 08:17:25 +00:00
Igor Breger
5a1297dc77 AVX512: add encoding tests for vmovq/d instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251903 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 07:30:17 +00:00
Tobias Grosser
0efe7b620e Revert "[IndVarSimplify] Rewrite loop exit values with their initial values from loop preheader"
Commit 251839 triggers miscompiles on some bots:

http://lab.llvm.org:8011/builders/perf-x86_64-penryn-O3-polly-fast/builds/13723

(The commit is listed in 13722, but due to an existing failure introduced in
13721 and reverted in 13723 the failure is only visible in 13723)

To verify r251839 is indeed the only change that triggered the buildbot failures
and to ensure the buildbots remain green while investigating I temporarily
revert this commit. At the current state it is unclear if this commit introduced
some miscompile or if it only exposed code to Polly that is subsequently
miscompiled by Polly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 07:14:39 +00:00
Matthias Braun
e5065bdcd7 Fix build problme introduced in r251883
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251888 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 02:19:07 +00:00
Matthias Braun
cfe39babc5 RegisterPressure: Improve assert message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 01:53:36 +00:00
Matthias Braun
363f18097a RegisterPressure: Slightly nicer pressure diff dumping
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251884 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 01:53:33 +00:00
Matthias Braun
e9564b2bbe ScheduleDAGInstrs: Remove IsPostRA flag; NFC
ScheduleDAGInstrs doesn't behave differently before or after register
allocation. It was only used in a method of MachineSchedulerBase which
behaved differently in MachineScheduler/PostMachineScheduler. Change
this to let MachineScheduler/PostMachineScheduler just pass in a
parameter to that function.

The order of the LiveIntervals* and bool RemoveKillFlags paramters have
been switched to make out-of-tree code fail instead of unintentionally
passing a value intended for the IsPostRA flag to the (previously
following and default initialized) RemoveKillFlags.

Differential Revision: http://reviews.llvm.org/D14245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 01:53:29 +00:00
Rafael Espindola
2356f2b5d9 This never returns end(), simplify to use Child instead of iterator. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 01:20:44 +00:00
Colin LeMahieu
b939021544 [Hexagon] Fixing mistaken case fallthrough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 00:21:19 +00:00
Teresa Johnson
0292f065c1 Restore "Support for ThinLTO function importing and symbol linking."
This restores commit r251837, with the new library dependence added to
llvm-link/Makefile to address bot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251866 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-03 00:14:15 +00:00
Matt Arsenault
142cd116fa AMDGPU: Stop assuming vreg for build_vector
This was causing a variety of test failures when v2i64
is added as a legal type.

SIFixSGPRCopies should correctly handle the case of vector inputs
to a scalar reg_sequence, so this isn't necessary anymore. This
was hiding some deficiencies in how reg_sequence is handled later,
but this shouldn't be a problem anymore since the register class
copy of a reg_sequence is now done before the reg_sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251860 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:30:48 +00:00
Derek Schuff
93508f2241 [WebAssembly] Make WebAssemblyCodeGen depend on WebAssemblyAsmPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251859 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:23:16 +00:00
Matt Arsenault
896d6554cb AMDGPU: Error on graphics shaders with HSA
I've found myself pointlessly debugging problems from running
graphics tests with an HSA triple a few times, so stop this from
happening again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:23:02 +00:00
Sanjay Patel
9620204c3b [CGP] widen switch condition and case constants to target's register width (2nd try)
This is a redo of r251849 except the tests have been split into arch-specific folders
to hopefully make the bots happy.

This is a follow-up from the discussion in D12965. The block-at-a-time limitation of
SelectionDAG also came up in D13297.

Without the InstCombine change from D12965, I don't expect this patch to make any
difference in the real world because InstCombine does not shrink cases like this in
visitSwitchInst(). But we need to have this CGP safety harness in place before
proceeding with any shrinkage in D12965, so we won't generate extra extends for compares.

I've opted for IR regression tests in the patch because that seems like a clearer way to
test the transform, but PowerPC CodeGen for an i16 widening test is shown below. x86
will need more work to solve: https://llvm.org/bugs/show_bug.cgi?id=22473

Before:
BB#0:
  mr 4, 3
  extsh. 3, 4
  ble 0, .LBB0_5
 BB#1:
  cmpwi  3, 99
  bgt    0, .LBB0_9
 BB#2:
  rlwinm 4, 4, 0, 16, 31      <--- 32-bit mask/extend
  li 3, 0
  cmplwi         4, 1
  beqlr 0
 BB#3:
  cmplwi         4, 10
  bne    0, .LBB0_12
 BB#4:
  li 3, 1
  blr
.LBB0_5:
  rlwinm 3, 4, 0, 16, 31      <--- 32-bit mask/extend
  cmplwi         3, 65436
  beq    0, .LBB0_13
 BB#6:
  cmplwi         3, 65526
  beq    0, .LBB0_15
 BB#7:
  cmplwi         3, 65535
  bne    0, .LBB0_12
 BB#8:
  li 3, 4
  blr
.LBB0_9:
  rlwinm 3, 4, 0, 16, 31      <--- 32-bit mask/extend
  cmplwi         3, 100
  beq    0, .LBB0_14
...

After:
BB#0:
  rlwinm 4, 3, 0, 16, 31      <--- mask/extend to 32-bit and then use that for comparisons
  cmpwi  4, 999
  ble 0, .LBB0_5
 BB#1:
  lis 3, 0
  ori 3, 3, 65525
  cmpw   4, 3
  bgt    0, .LBB0_9
 BB#2:
  cmplwi         4, 1000
  beq    0, .LBB0_14
 BB#3:
  cmplwi         4, 65436
  bne    0, .LBB0_13
 BB#4:
  li 3, 6
  blr
.LBB0_5:
  li 3, 0
  cmplwi         4, 1
  beqlr 0
 BB#6:
  cmplwi         4, 10
  beq    0, .LBB0_12
 BB#7:
  cmplwi         4, 100
  bne    0, .LBB0_13
 BB#8:
  li 3, 2
  blr
.LBB0_9:
  cmplwi         4, 65526
  beq    0, .LBB0_15
 BB#10:
  cmplwi         4, 65535
  bne    0, .LBB0_13
...


Differential Revision: http://reviews.llvm.org/D13532



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251857 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:22:49 +00:00
Matt Arsenault
bd96659e08 AMDGPU: Distribute SGPR->VGPR copies of REG_SEQUENCE
Make the REG_SEQUENCE be a VGPR, and do the register class
copy first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:15:42 +00:00
Davide Italiano
e8e35e60d8 [SimplifyLibCalls] Remove variables that are not used. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:07:14 +00:00
Sanjay Patel
2762d00d74 revert r251849; need to move tests to arch-specific folders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 23:05:20 +00:00
Cong Hou
c895fd0d67 Add a flag vectorizer-maximize-bandwidth in loop vectorizer to enable using larger vectorization factor.
To be able to maximize the bandwidth during vectorization, this patch provides a new flag vectorizer-maximize-bandwidth. When it is turned on, the vectorizer will determine the vectorization factor (VF) using the smallest instead of widest type in the loop. To avoid increasing register pressure too much, estimates of the register usage for different VFs are calculated so that we only choose a VF when its register usage doesn't exceed the number of available registers.

This is the second attempt to submit this patch. The first attempt got a test failure on ARM. This patch is updated to try to fix the failure (more specifically, by handling the case when VF=1).

Differential revision: http://reviews.llvm.org/D8943



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:53:48 +00:00
Sanjay Patel
1e6387531e [CGP] widen switch condition and case constants to target's register width
This is a follow-up from the discussion in D12965. The block-at-a-time limitation of 
SelectionDAG also came up in D13297.

Without the InstCombine change from D12965, I don't expect this patch to make any 
difference in the real world because InstCombine does not shrink cases like this in
visitSwitchInst(). But we need to have this CGP safety harness in place before
proceeding with any shrinkage in D12965, so we won't generate extra extends for compares.

I've opted for IR regression tests in the patch because that seems like a clearer way to
test the transform, but PowerPC CodeGen for an i16 widening test is shown below. x86
will need more work to solve: https://llvm.org/bugs/show_bug.cgi?id=22473

Before:
BB#0:
  mr 4, 3
  extsh. 3, 4
  ble 0, .LBB0_5
 BB#1: 
  cmpwi	 3, 99
  bgt	 0, .LBB0_9
 BB#2:            
  rlwinm 4, 4, 0, 16, 31      <--- 32-bit mask/extend
  li 3, 0
  cmplwi	 4, 1
  beqlr 0
 BB#3:            
  cmplwi	 4, 10
  bne	 0, .LBB0_12
 BB#4:                      
  li 3, 1
  blr
.LBB0_5:                             
  rlwinm 3, 4, 0, 16, 31      <--- 32-bit mask/extend
  cmplwi	 3, 65436
  beq	 0, .LBB0_13
 BB#6:                            
  cmplwi	 3, 65526
  beq	 0, .LBB0_15
 BB#7:                       
  cmplwi	 3, 65535
  bne	 0, .LBB0_12
 BB#8:                       
  li 3, 4
  blr
.LBB0_9:                       
  rlwinm 3, 4, 0, 16, 31      <--- 32-bit mask/extend
  cmplwi	 3, 100
  beq	 0, .LBB0_14
...

After:
BB#0:        
  rlwinm 4, 3, 0, 16, 31      <--- mask/extend to 32-bit and then use that for comparisons
  cmpwi	 4, 999
  ble 0, .LBB0_5
 BB#1:          
  lis 3, 0
  ori 3, 3, 65525
  cmpw	 4, 3
  bgt	 0, .LBB0_9
 BB#2:         
  cmplwi	 4, 1000
  beq	 0, .LBB0_14
 BB#3:    
  cmplwi	 4, 65436
  bne	 0, .LBB0_13
 BB#4:       
  li 3, 6
  blr
.LBB0_5:   
  li 3, 0
  cmplwi	 4, 1
  beqlr 0
 BB#6: 
  cmplwi	 4, 10
  beq	 0, .LBB0_12
 BB#7:             
  cmplwi	 4, 100
  bne	 0, .LBB0_13
 BB#8:             
  li 3, 2
  blr
.LBB0_9:       
  cmplwi	 4, 65526
  beq	 0, .LBB0_15
 BB#10:      
  cmplwi	 4, 65535
  bne	 0, .LBB0_13
...


Differential Revision: http://reviews.llvm.org/D13532



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:46:24 +00:00
Bill Schmidt
5ae08fa0db [PPC64LE] Properly initialize instr-info in PPCVSXSwapRemoval pass
Replace some hacky code with the proper way to get at this data.

No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251848 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:43:57 +00:00
Sanjay Patel
9e9408f07b don't repeat function names in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251846 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:34:55 +00:00
Davide Italiano
256403a9af [SimplifyLibCalls] Merge two if statements. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251845 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:33:26 +00:00
Teresa Johnson
3d95431a33 Revert "Support for ThinLTO function importing and symbol linking."
This reverts commit r251837, due to a number of bot failures of the form:

/home/grosser/buildslave/perf-x86_64-penryn-O3-polly-fast/llvm.obj/tools/llvm-link/Release+Asserts/llvm-link.o:llvm-link.cpp:function
loadIndex(llvm::LLVMContext&, llvm::Module const*): error: undefined
reference to
'llvm::object::FunctionIndexObjectFile::create(llvm::MemoryBufferRef,
llvm::LLVMContext&, llvm::Module const*, bool)'
/home/grosser/buildslave/perf-x86_64-penryn-O3-polly-fast/llvm.obj/tools/llvm-link/Release+Asserts/llvm-link.o:llvm-link.cpp:function
loadIndex(llvm::LLVMContext&, llvm::Module const*): error: undefined
reference to 'llvm::object::FunctionIndexObjectFile::takeIndex()'

I'm not sure why these are happening - I added Object to the requred
libraries in tools/llvm-link/LLVMBuild.txt and the LLVM_LINK_COMPONENTS
in tools/llvm-link/CMakeLists.txt. Confirmed for my build that these
symbols come out of libLLVMObject.a. What am I missing?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251841 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:17:32 +00:00
Chen Li
fb81c7b828 [IndVarSimplify] Rewrite loop exit values with their initial values from loop preheader
Summary:
This patch adds support to check if a loop has loop invariant conditions which lead to loop exits. If so, we know that if the exit path is taken, it is at the first loop iteration. If there is an induction variable used in that exit path whose value has not been updated, it will keep its initial value passing from loop preheader. We can therefore rewrite the exit value with
its initial value. This will help remove phis created by LCSSA and enable other optimizations like loop unswitch.


Reviewers: sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251839 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 22:00:15 +00:00
Teresa Johnson
5aa157fab6 Support for ThinLTO function importing and symbol linking.
Summary:
Support for necessary linkage changes and symbol renaming during
ThinLTO function importing.

Also includes llvm-link support for manually importing functions
and associated llvm-link based tests.

Note that this does not include support for intelligently importing
metadata, which is currently imported duplicate times. That support will
be in the follow-on patch, and currently is ignored by the tests.

Reviewers: dexonsmith, joker.eph, davidxl

Subscribers: tobiasvk, tejohnson, llvm-commits

Differential Revision: http://reviews.llvm.org/D13515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 21:39:10 +00:00
Cong Hou
b18412ca5b In MachineBlockPlacement, filter cold blocks off the loop chain when profile data is available.
In the current BB placement algorithm, a loop chain always contains all loop blocks. This has a drawback that cold blocks in the loop may be inserted on a hot function path, hence increasing branch cost and also reducing icache locality.

Consider a simple example shown below:

A
|
B⇆C
|
D

When B->C is quite cold, the best BB-layout should be A,B,D,C. But the current implementation produces A,C,B,D.

This patch filters those cold blocks off from the loop chain by comparing the ratio:

LoopBBFreq / LoopFreq

to 20%: if it is less than 20%, we don't include this BB to the loop chain. Here LoopFreq is the frequency of the loop when we reduce the loop into a single node. In general we have more cold blocks when the loop has few iterations. And vice versa.


Differential revision: http://reviews.llvm.org/D11662




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251833 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 21:24:00 +00:00
Teresa Johnson
81c3746b68 Fix use-after-free in function index merging code.
This was flagged by ASAN when using a test case I will be committing
along with D13515.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 20:43:33 +00:00
David Blaikie
5c6a6f6ad5 StringRef-ify DiagnosticInfoSampleProfile::Filename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251823 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 20:01:13 +00:00
Rafael Espindola
a0fd526ce8 ELF can handle some relocations of the form -sym + constant.
Remove code that was assuming that this would never work.

Thanks to Colin LeMahie for finding and diagnosing the bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 19:13:59 +00:00
James Y Knight
74615f5548 Fix two issues in MergeConsecutiveStores:
1) PR25154. This is basically a repeat of PR18102, which was fixed in
r200201, and broken again by r234430. The latter changed which of the
store nodes was merged into from the first to the last. Thus, we now
also need to prefer merging a later store at a given address into the
target node, instead of an earlier one.

2) While investigating that, I also realized I'd introduced a bug in
r236850. There, I removed a check for alignment -- not realizing that
nothing except the alignment check was ensuring that none of the stores
were overlapping! This is a really bogus way to ensure there's no
aliased stores.

A better solution to both of these issues is likely to always use the
code added in the 'if (UseAA)' branches which rearrange the chain based
on a more principled analysis. I'll look into whether that can be used
always, but in the interest of getting things back to working, I think a
minimal change makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251816 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 18:48:08 +00:00
Tim Northover
8985f872f1 WatchOS: update default CPU for triple after t2dsp -> dsp rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 18:21:07 +00:00
Teresa Johnson
9dd98c0eab Clang format a few prior patches (NFC)
I had clang formatted my earlier patches using the wrong style.
Reformatted with the LLVM style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251812 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 18:02:11 +00:00
Tim Northover
68eb8a5215 TvOS: add missing support for some libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251811 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 18:00:00 +00:00
Artur Pilipenko
bf7f89f132 Preserve load alignment and dereferenceable metadata during some transformations
Reviewed By: hfinkel

Differential Revision: http://reviews.llvm.org/D13953


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 17:53:51 +00:00
Pawel Bylica
de9b4c2b53 Use static instead of anonymous namespace for helper functions. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-02 14:57:24 +00:00