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6547 Commits

Author SHA1 Message Date
Chris Lattner
5673e1d314 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:41:40 +00:00
Chris Lattner
41efbfaa66 move various pattern matching support goop out of X86Instr64Bit, to live 
with the 32-bit stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:37:31 +00:00
Chris Lattner
35649fc3dd split conditional moves and setcc's out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:33:16 +00:00
Chris Lattner
d3f033d969 move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115600 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:27:48 +00:00
Chris Lattner
010496c6a7 move the atomic pseudo instructions out to X86InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:22:35 +00:00
Chris Lattner
8af88ef157 move more pseudo instructions out to X86InstrCompiler.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:10:16 +00:00
Chris Lattner
d071b83b5d move VMX instructions out to their own file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:06:53 +00:00
Chris Lattner
87be16a9e1 continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:04:14 +00:00
Chris Lattner
434c7cb8a1 refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 05:32:15 +00:00
Bill Wendling
6cf6c79e82 The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-04 20:24:01 +00:00
Anton Korobeynikov
e7beda183d va_args support for Win64. 
Patch by Cameron!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 22:52:07 +00:00
Anton Korobeynikov
6af61ca789 Properly emit stack probe on win64 (for non-mingw targets). 
Based on the patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115479 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 22:02:38 +00:00
Eli Friedman
d32d85e5ba Add 3DNowA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 20:23:13 +00:00
Chris Lattner
591d76ea5a the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 19:09:13 +00:00
Rafael Espindola
0febc4657b Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do 
so and also change X86 for consistency.

Investigating if this can be improved a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:59:45 +00:00
Chris Lattner
cc07d7116a add support for the prefetch/prefetchw instructions, move femms into 
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:42:30 +00:00
Chris Lattner
f132fa0e74 what the heck, add support for the rest of the 3dNow! binary operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115467 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:24:18 +00:00
Chris Lattner
548abfcbd6 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-03 18:08:05 +00:00
Chris Lattner
7330d97069 stub out a header to put 3dNow! instructions into. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115429 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 23:06:23 +00:00
Chris Lattner
d476914607 fix a regression introduced in r115243, in which the instruction 
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115422 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-02 21:32:15 +00:00
Jim Grosbach
7ac1609a3b Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 22:39:28 +00:00
Benjamin Kramer
b0f96facd6 Delete token *after* reading from it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115311 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-01 12:25:27 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:57:10 +00:00
Jim Grosbach
ddcf859851 Clean up asm writer usage for x86 and msp430 to flag that the writer should 
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115238 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 23:40:25 +00:00
Chris Lattner
905f2e0669 preemptively add the rest of the non-n fpstack instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 17:11:29 +00:00
Chris Lattner
9ee4aed3b6 implement support for finit, PR8258 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115156 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:42:53 +00:00
Chris Lattner
0bb83a84d4 add support for fstcw, PR8259 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:39:29 +00:00
Kevin Enderby
8ebf66236e Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 16:38:07 +00:00
Rafael Espindola
a8c02c3bdd Correctly produce R_X86_64_32 or R_X86_64_32S. 
With this patch in

movq    $foo, foo(%rip)
foo:
.long   foo

We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-30 03:11:42 +00:00
Eric Christopher
e487b017e9 Noticed by inspection when looking for other cmov bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 23:00:29 +00:00
Nick Lewycky
8892b033e4 Add parens to fix GCC warning: 
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 18:56:57 +00:00
Chris Lattner
a25f933396 implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 18:39:16 +00:00
Chris Lattner
6f42027263 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 05:05:03 +00:00
Chris Lattner
f3654db458 add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115027 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 04:55:40 +00:00
Chris Lattner
78a194693b make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same 
order as cctools for diffability.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 03:43:43 +00:00
Chris Lattner
8a5072903e implement support for 32-bit address operands in 64-bit mode, which 
are defined to emit the 0x67 prefix byte.  rdar://8482675


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115021 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 03:33:25 +00:00
Chris Lattner
b2ef4c1235 add basic avx support to the disassembler, also teach it about ssmem/sdmem 
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115019 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:57:56 +00:00
Chris Lattner
bf6018ac5a add asmparser support for cvttpd2dq by removing some Int_ prefixes. 
Clean up cvttps2dq by removing some redundant implementations of the
same instruction.  rdar://8456382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:36:32 +00:00
Chris Lattner
0c04e4f58f implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115017 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:24:57 +00:00
Chris Lattner
7c51a3172c implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:50:45 +00:00
Chris Lattner
7036f8be4d change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 01:42:58 +00:00
Dale Johannesen
a8bd1ff8c5 MMX parameters aren't handled here yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 17:29:47 +00:00
Chris Lattner
2956462742 yet more aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114822 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:24:57 +00:00
Chris Lattner
b1162fc05e add a couple more aliases, rdar://8456378 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114821 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:21:41 +00:00
Chris Lattner
df967d6137 fix rdar://8470918 - llvm-mc can't assemble smovl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114819 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:11:53 +00:00
Chris Lattner
cb296ec0b6 Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands. 
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd.  Instruction set orthogonality is overrated or 
something.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 07:08:21 +00:00
Chris Lattner
80945784f9 improve indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:34:01 +00:00
Eric Christopher
722d315ac9 This code should never fire on non-darwin subtargets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114811 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 06:01:51 +00:00
Chris Lattner
fd8fddd830 implement support for 'clr' alias. This is part of rdar://8416805, 
but balrog was wanting it on irc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-27 04:23:03 +00:00
Rafael Espindola
73ffea47d2 Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put 
symbols defined in merge sections in independent atoms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114786 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-25 05:42:19 +00:00